Fix ShaderTools GpuAcessor default values (#5646)

Bumps [actions/checkout](https://github.com/actions/checkout) from 3 to 4.
- [Release notes](https://github.com/actions/checkout/releases)
- [Changelog](https://github.com/actions/checkout/blob/main/CHANGELOG.md)
- [Commits](https://github.com/actions/checkout/compare/v3...v4)

---
updated-dependencies:
- dependency-name: actions/checkout
  dependency-type: direct:production
  update-type: version-update:semver-major
...

Signed-off-by: dependabot[bot] <support@github.com>
Co-authored-by: dependabot[bot] <49699333+dependabot[bot]@users.noreply.github.com>

.editorconfig

@@ -1,8 +1,7 @@
 # Remove the line below if you want to inherit .editorconfig settings from higher directories
 root = true
 
-# C# files
-[*.cs]
+[*]
 
 #### Core EditorConfig Options ####
 
@@ -12,8 +11,18 @@ indent_style = space
 tab_width = 4
 
 # New line preferences
-end_of_line = crlf
-insert_final_newline = false
+end_of_line = lf
+insert_final_newline = true
+
+# JSON files
+[*.json]
+
+# Indentation and spacing
+indent_size = 2
+tab_width = 2
+
+# C# files
+[*.cs]
 
 #### .NET Coding Conventions ####
 
@@ -59,7 +68,7 @@ dotnet_style_prefer_simplified_interpolation = true:suggestion
 dotnet_style_readonly_field = true:suggestion
 
 # Parameter preferences
-dotnet_code_quality_unused_parameters = all:suggestion
+dotnet_code_quality_unused_parameters = all:silent
 
 #### C# Coding Conventions ####
 
@@ -85,7 +94,7 @@ csharp_style_expression_bodied_properties = true:silent
 # Pattern matching preferences
 csharp_style_pattern_matching_over_as_with_null_check = true:suggestion
 csharp_style_pattern_matching_over_is_with_cast_check = true:suggestion
-csharp_style_prefer_switch_expression = true:suggestion
+csharp_style_prefer_switch_expression = false:silent
 
 # Null-checking preferences
 csharp_style_conditional_delegate_call = true:suggestion
@@ -94,6 +103,7 @@ csharp_style_conditional_delegate_call = true:suggestion
 csharp_prefer_static_local_function = true:suggestion
 csharp_preferred_modifier_order = public,private,protected,internal,static,extern,new,virtual,abstract,sealed,override,readonly,unsafe,volatile,async:silent
 csharp_style_prefer_readonly_struct = true
+csharp_style_prefer_method_group_conversion = true
 
 # Code-block preferences
 csharp_prefer_braces = true:silent
@@ -109,6 +119,7 @@ csharp_style_prefer_range_operator = true:suggestion
 csharp_style_throw_expression = true:suggestion
 csharp_style_unused_value_assignment_preference = discard_variable:suggestion
 csharp_style_unused_value_expression_statement_preference = discard_variable:silent
+csharp_style_implicit_object_creation_when_type_is_apparent = true
 
 # 'using' directive preferences
 csharp_using_directive_placement = outside_namespace:silent
@@ -140,7 +151,6 @@ csharp_space_after_dot = false
 csharp_space_after_keywords_in_control_flow_statements = true
 csharp_space_after_semicolon_in_for_statement = true
 csharp_space_around_binary_operators = before_and_after
-csharp_space_around_declaration_statements = false
 csharp_space_before_colon_in_inheritance_clause = true
 csharp_space_before_comma = false
 csharp_space_before_dot = false
@@ -158,23 +168,31 @@ csharp_space_between_square_brackets = false
 
 # Wrapping preferences
 csharp_preserve_single_line_blocks = true
-csharp_preserve_single_line_statements = true
+csharp_preserve_single_line_statements = false
 
 #### Naming styles ####
 
 # Naming rules
 
-dotnet_naming_rule.interface_should_be_begins_with_i.severity = suggestion
-dotnet_naming_rule.interface_should_be_begins_with_i.symbols = interface
-dotnet_naming_rule.interface_should_be_begins_with_i.style = begins_with_i
+dotnet_naming_rule.interfaces_should_be_prefixed_with_I.severity = suggestion
+dotnet_naming_rule.interfaces_should_be_prefixed_with_I.symbols = interface
+dotnet_naming_rule.interfaces_should_be_prefixed_with_I.style = IPascalCase
 
 dotnet_naming_rule.types_should_be_pascal_case.severity = suggestion
 dotnet_naming_rule.types_should_be_pascal_case.symbols = types
-dotnet_naming_rule.types_should_be_pascal_case.style = pascal_case
+dotnet_naming_rule.types_should_be_pascal_case.style = PascalCase
 
 dotnet_naming_rule.non_field_members_should_be_pascal_case.severity = suggestion
 dotnet_naming_rule.non_field_members_should_be_pascal_case.symbols = non_field_members
-dotnet_naming_rule.non_field_members_should_be_pascal_case.style = pascal_case
+dotnet_naming_rule.non_field_members_should_be_pascal_case.style = PascalCase
+
+dotnet_naming_rule.private_static_readonly_fields_should_be_camel_case_and_prefixed_with__.symbols = private_static_readonly_fields
+dotnet_naming_rule.private_static_readonly_fields_should_be_camel_case_and_prefixed_with__.severity = suggestion
+dotnet_naming_rule.private_static_readonly_fields_should_be_camel_case_and_prefixed_with__.style = _camelCase
+
+dotnet_naming_rule.local_constants_should_be_pascal_case.symbols = local_constants
+dotnet_naming_rule.local_constants_should_be_pascal_case.severity = suggestion
+dotnet_naming_rule.local_constants_should_be_pascal_case.style = PascalCase
 
 # Symbol specifications
 
@@ -190,14 +208,39 @@ dotnet_naming_symbols.non_field_members.applicable_kinds = property, event, meth
 dotnet_naming_symbols.non_field_members.applicable_accessibilities = public, internal, private, protected, protected_internal, private_protected
 dotnet_naming_symbols.non_field_members.required_modifiers =
 
+dotnet_naming_symbols.private_static_readonly_fields.applicable_kinds = field
+dotnet_naming_symbols.private_static_readonly_fields.applicable_accessibilities = private
+dotnet_naming_symbols.private_static_readonly_fields.required_modifiers = static, readonly
+
+dotnet_naming_symbols.local_constants.applicable_kinds = local
+dotnet_naming_symbols.local_constants.applicable_accessibilities = local
+dotnet_naming_symbols.local_constants.required_modifiers = const
+
 # Naming styles
 
-dotnet_naming_style.pascal_case.required_prefix =
-dotnet_naming_style.pascal_case.required_suffix =
-dotnet_naming_style.pascal_case.word_separator =
-dotnet_naming_style.pascal_case.capitalization = pascal_case
+dotnet_naming_style._camelCase.required_prefix = _
+dotnet_naming_style._camelCase.required_suffix =
+dotnet_naming_style._camelCase.word_separator =
+dotnet_naming_style._camelCase.capitalization = camel_case
 
-dotnet_naming_style.begins_with_i.required_prefix = I
-dotnet_naming_style.begins_with_i.required_suffix =
-dotnet_naming_style.begins_with_i.word_separator =
-dotnet_naming_style.begins_with_i.capitalization = pascal_case
+dotnet_naming_style.PascalCase.required_prefix =
+dotnet_naming_style.PascalCase.required_suffix =
+dotnet_naming_style.PascalCase.word_separator =
+dotnet_naming_style.PascalCase.capitalization = pascal_case
+
+dotnet_naming_style.IPascalCase.required_prefix = I
+dotnet_naming_style.IPascalCase.required_suffix =
+dotnet_naming_style.IPascalCase.word_separator =
+dotnet_naming_style.IPascalCase.capitalization = pascal_case
+
+[src/Ryujinx.HLE/HOS/Services/**.cs]
+# Disable "mark members as static" rule for services
+dotnet_diagnostic.CA1822.severity = none
+
+[src/Ryujinx.Ava/UI/ViewModels/**.cs]
+# Disable "mark members as static" rule for ViewModels
+dotnet_diagnostic.CA1822.severity = none
+
+[src/Ryujinx.Tests/Cpu/*.cs]
+# Disable naming rules for CPU tests
+dotnet_diagnostic.IDE1006.severity = none

.github/assign/audio.yml

@@ -1,8 +0,0 @@
-addReviewers: true
-
-reviewers:
-  - marysaka
-
-filterLabels:
-  include:
-    - audio

.github/assign/cpu.yml

@@ -1,11 +0,0 @@
-addReviewers: true
-
-reviewers:
-  - gdkchan
-  - riperiperi
-  - marysaka
-  - LDj3SNuD
-
-filterLabels:
-  include:
-    - cpu

.github/assign/global.yml

@@ -1,4 +0,0 @@
-addReviewers: true
-
-reviewers:
-  - Ryujinx/developers

.github/assign/gpu.yml

@@ -1,10 +0,0 @@
-addReviewers: true
-
-reviewers:
-  - gdkchan
-  - riperiperi
-  - marysaka
-
-filterLabels:
-  include:
-    - gpu

.github/assign/gui.yml

@@ -1,11 +0,0 @@
-addReviewers: true
-
-reviewers:
-  - Ack77
-  - emmauss
-  - TSRBerry
-  - marysaka
-
-filterLabels:
-  include:
-    - gui

.github/assign/horizon.yml

@@ -1,11 +0,0 @@
-addReviewers: true
-
-reviewers:
-  - gdkchan
-  - Ack77
-  - marysaka
-  - TSRBerry
-
-filterLabels:
-  include:
-    - horizon

.github/assign/infra.yml

@@ -1,9 +0,0 @@
-addReviewers: true
-
-reviewers:
-  - marysaka
-  - TSRBerry
-
-filterLabels:
-  include:
-    - infra

.github/csc.json

@@ -0,0 +1,18 @@
+{
+    "problemMatcher": [
+        {
+            "owner": "csc",
+            "pattern": [
+                {
+                    "regexp": "^((?:\\\\|/)(?:[^\\\\/:]+(?:\\\\|/))+[^\\\\/]+)\\((\\d+),(\\d+)\\):\\s+([a-zA-Z]+)\\s+([^:]+):\\s+([^[]+)\\s+\\[",
+                    "file": 1,
+                    "line": 2,
+                    "column": 3,
+                    "severity": 4,
+                    "code": 5,
+                    "message": 6
+                }
+            ]
+        }
+    ]
+}

.github/reviewers.yml

@@ -0,0 +1,32 @@
+audio:
+  - marysaka
+
+cpu:
+  - gdkchan
+  - riperiperi
+  - marysaka
+  - LDj3SNuD
+
+gpu:
+  - gdkchan
+  - riperiperi
+  - marysaka
+
+gui:
+  - Ack77
+  - emmauss
+  - TSRBerry
+  - marysaka
+
+horizon:
+  - gdkchan
+  - Ack77
+  - marysaka
+  - TSRBerry
+
+infra:
+  - marysaka
+  - TSRBerry
+
+default:
+  - '@developers'

.github/workflows/build.yml

@@ -1,20 +1,7 @@
 name: Build job
 
 on:
-  workflow_dispatch:
-    inputs: {}
-  pull_request:
-    branches: [ master ]
-    paths-ignore:
-      - '.github/**'
-      - '*.yml'
-      - '*.json'
-      - '*.config'
-      - 'README.md'
-
-concurrency:
-  group: pr-checks-${{ github.event.number }}
-  cancel-in-progress: true
+  workflow_call:
 
 env:
   POWERSHELL_TELEMETRY_OPTOUT: 1
@@ -48,11 +35,14 @@ jobs:
 
       fail-fast: false
     steps:
-      - uses: actions/checkout@v3
+      - uses: actions/checkout@v4
 
       - uses: actions/setup-dotnet@v3
         with:
           global-json-file: global.json
+          
+      - name: Overwrite csc problem matcher
+        run: echo "::add-matcher::.github/csc.json"
 
       - name: Get git short hash
         id: git_short_hash
@@ -63,7 +53,11 @@ jobs:
         run: dotnet build -c "${{ matrix.configuration }}" -p:Version="${{ env.RYUJINX_BASE_VERSION }}" -p:SourceRevisionId="${{ steps.git_short_hash.outputs.result }}" -p:ExtraDefineConstants=DISABLE_UPDATER
 
       - name: Test
-        run: dotnet test --no-build -c "${{ matrix.configuration }}"
+        uses: TSRBerry/unstable-commands@v1
+        with:
+          commands: dotnet test --no-build -c "${{ matrix.configuration }}"
+          timeout-minutes: 10
+          retry-codes: 139
 
       - name: Publish Ryujinx
         run: dotnet publish -c "${{ matrix.configuration }}" -r "${{ matrix.DOTNET_RUNTIME_IDENTIFIER }}" -o ./publish -p:Version="${{ env.RYUJINX_BASE_VERSION }}" -p:DebugType=embedded -p:SourceRevisionId="${{ steps.git_short_hash.outputs.result }}" -p:ExtraDefineConstants=DISABLE_UPDATER src/Ryujinx --self-contained true
@@ -114,7 +108,7 @@ jobs:
         configuration: [ Debug, Release ]
 
     steps:
-      - uses: actions/checkout@v3
+      - uses: actions/checkout@v4
 
       - uses: actions/setup-dotnet@v3
         with:
@@ -150,4 +144,4 @@ jobs:
         with:
           name: ava-ryujinx-${{ matrix.configuration }}-${{ env.RYUJINX_BASE_VERSION }}+${{ steps.git_short_hash.outputs.result }}-macos_universal
           path: "publish_ava/*.tar.gz"
-        if: github.event_name == 'pull_request'
+        if: github.event_name == 'pull_request'

.github/workflows/checks.yml

@@ -0,0 +1,74 @@
+name: Perform checks
+
+on:
+  pull_request:
+    branches: [ master ]
+    paths:
+      - '**'
+      - '!.github/**'
+      - '!*.yml'
+      - '!*.config'
+      - '!README.md'
+      - '.github/workflows/*.yml'
+
+permissions:
+  pull-requests: write
+  checks: write
+
+concurrency:
+  group: pr-checks-${{ github.event.number }}
+  cancel-in-progress: true
+
+jobs:
+  format:
+    runs-on: ubuntu-latest
+    steps:
+      - uses: actions/checkout@v4
+        with:
+          fetch-depth: 0
+
+      - uses: actions/setup-dotnet@v3
+        with:
+          global-json-file: global.json
+
+      - name: Overwrite csc problem matcher
+        run: echo "::add-matcher::.github/csc.json"
+
+      - run: dotnet restore
+
+      - name: Print dotnet format version
+        run: dotnet format --version
+
+      - name: Run dotnet format whitespace
+        run: |
+          dotnet format whitespace --verify-no-changes --report ./whitespace-report.json -v d
+
+      # For some unknown reason this step sometimes fails with exit code 139 (segfault?),
+      # so in that case we'll try again (3 tries max).
+      - name: Run dotnet format style
+        uses: TSRBerry/unstable-commands@v1
+        with:
+          commands: dotnet format style --severity info --verify-no-changes --report ./style-report.json -v d
+          timeout-minutes: 5
+          retry-codes: 139
+
+      # For some unknown reason this step sometimes fails with exit code 139 (segfault?),
+      # so in that case we'll try again (3 tries max).
+      - name: Run dotnet format analyzers
+        uses: TSRBerry/unstable-commands@v1
+        with:
+          commands: dotnet format analyzers --severity info --verify-no-changes --report ./analyzers-report.json -v d
+          timeout-minutes: 5
+          retry-codes: 139
+
+      - name: Upload report
+        if: failure()
+        uses: actions/upload-artifact@v3
+        with:
+          name: dotnet-format
+          path: ./*-report.json
+
+  pr_build:
+    uses: ./.github/workflows/build.yml
+    needs: format
+    secrets: inherit

.github/workflows/flatpak.yml

@@ -24,7 +24,7 @@ jobs:
       RYUJINX_VERSION: "${{ inputs.ryujinx_version }}"
 
     steps:
-      - uses: actions/checkout@v3
+      - uses: actions/checkout@v4
         with:
           path: Ryujinx
 
@@ -38,7 +38,7 @@ jobs:
         run: |
           echo "git_hash=$(git rev-parse HEAD)" >> $GITHUB_OUTPUT
 
-      - uses: actions/checkout@v3
+      - uses: actions/checkout@v4
         with:
           repository: flathub/org.ryujinx.Ryujinx
           token: ${{ secrets.RYUJINX_BOT_PAT }}

.github/workflows/nightly_pr_comment.yml

@@ -1,8 +1,10 @@
 name: Comment PR artifacts links
+
 on:
   workflow_run:
-    workflows: ['Build job']
+    workflows: ['Perform checks']
     types: [completed]
+
 jobs:
   pr_comment:
     if: github.event.workflow_run.event == 'pull_request' && github.event.workflow_run.conclusion == 'success'

.github/workflows/pr_triage.yml

@@ -12,43 +12,36 @@ jobs:
     runs-on: ubuntu-latest
 
     steps:
+      # Grab sources to get latest labeler.yml
+      - name: Fetch sources
+        uses: actions/checkout@v4
+        with:
+           # Ensure we pin the source origin as pull_request_target run under forks.
+           fetch-depth: 0
+           repository: Ryujinx/Ryujinx
+           ref: master
+
+      - name: Checkout Ryujinx-Mako
+        uses: actions/checkout@v4
+        with:
+            repository: Ryujinx/Ryujinx-Mako
+            ref: master
+            path: '.ryujinx-mako'
+
+      - name: Setup Ryujinx-Mako
+        uses: ./.ryujinx-mako/.github/actions/setup-mako
+
       - name: Update labels based on changes
         uses: actions/labeler@v4
         with:
           sync-labels: true
           dot: true
 
-      - name: Auto Assign [Audio]
-        uses: kentaro-m/auto-assign-action@v1.2.5
-        with:
-          configuration-path: '.github/assign/audio.yml'
-
-      - name: Auto Assign [CPU]
-        uses: kentaro-m/auto-assign-action@v1.2.5
-        with:
-          configuration-path: '.github/assign/cpu.yml'
-
-      - name: Auto Assign [GPU]
-        uses: kentaro-m/auto-assign-action@v1.2.5
-        with:
-          configuration-path: '.github/assign/gpu.yml'
-
-      - name: Auto Assign [GUI]
-        uses: kentaro-m/auto-assign-action@v1.2.5
-        with:
-          configuration-path: '.github/assign/gui.yml'
-
-      - name: Auto Assign [Horizon]
-        uses: kentaro-m/auto-assign-action@v1.2.5
-        with:
-          configuration-path: '.github/assign/horizon.yml'
-
-      - name: Auto Assign [Infra]
-        uses: kentaro-m/auto-assign-action@v1.2.5
-        with:
-          configuration-path: '.github/assign/infra.yml'
-
-      - name: Auto Assign [Global]
-        uses: kentaro-m/auto-assign-action@v1.2.5
-        with:
-          configuration-path: '.github/assign/global.yml'
+      - name: Assign reviewers
+        run: |
+            poetry -n -C .ryujinx-mako run ryujinx-mako update-reviewers ${{ github.repository }} ${{ github.event.pull_request.number }} .github/reviewers.yml
+        shell: bash
+        env:
+            MAKO_APP_ID: ${{ secrets.MAKO_APP_ID }}
+            MAKO_PRIVATE_KEY: ${{ secrets.MAKO_PRIVATE_KEY }}
+            MAKO_INSTALLATION_ID: ${{ secrets.MAKO_INSTALLATION_ID }}

.github/workflows/release.yml

@@ -62,11 +62,14 @@ jobs:
             DOTNET_RUNTIME_IDENTIFIER: win10-x64
             RELEASE_ZIP_OS_NAME: win_x64
     steps:
-      - uses: actions/checkout@v3
+      - uses: actions/checkout@v4
 
       - uses: actions/setup-dotnet@v3
         with:
           global-json-file: global.json
+          
+      - name: Overwrite csc problem matcher
+        run: echo "::add-matcher::.github/csc.json"
 
       - name: Get version info
         id: version_info
@@ -147,7 +150,7 @@ jobs:
     runs-on: ubuntu-latest
     timeout-minutes: ${{ fromJSON(vars.JOB_TIMEOUT) }}
     steps:
-      - uses: actions/checkout@v3
+      - uses: actions/checkout@v4
 
       - uses: actions/setup-dotnet@v3
         with:

Directory.Packages.props

@@ -3,25 +3,25 @@
     <ManagePackageVersionsCentrally>true</ManagePackageVersionsCentrally>
   </PropertyGroup>
   <ItemGroup>
-    <PackageVersion Include="Avalonia" Version="0.10.21" />
-    <PackageVersion Include="Avalonia.Controls.DataGrid" Version="0.10.21" />
-    <PackageVersion Include="Avalonia.Desktop" Version="0.10.21" />
-    <PackageVersion Include="Avalonia.Diagnostics" Version="0.10.21" />
-    <PackageVersion Include="Avalonia.Markup.Xaml.Loader" Version="0.10.21" />
-    <PackageVersion Include="Avalonia.Svg" Version="0.10.18" />
-    <PackageVersion Include="Avalonia.Svg.Skia" Version="0.10.18" />
+    <PackageVersion Include="Avalonia" Version="11.0.3" />
+    <PackageVersion Include="Avalonia.Controls.DataGrid" Version="11.0.3" />
+    <PackageVersion Include="Avalonia.Desktop" Version="11.0.3" />
+    <PackageVersion Include="Avalonia.Diagnostics" Version="11.0.3" />
+    <PackageVersion Include="Avalonia.Markup.Xaml.Loader" Version="11.0.3" />
+    <PackageVersion Include="Avalonia.Svg" Version="11.0.0" />
+    <PackageVersion Include="Avalonia.Svg.Skia" Version="11.0.0" />
     <PackageVersion Include="CommandLineParser" Version="2.9.1" />
     <PackageVersion Include="Concentus" Version="1.1.7" />
-    <PackageVersion Include="DiscordRichPresence" Version="1.1.3.18" />
+    <PackageVersion Include="DiscordRichPresence" Version="1.2.1.24" />
     <PackageVersion Include="DynamicData" Version="7.14.2" />
-    <PackageVersion Include="FluentAvaloniaUI" Version="1.4.5" />
+    <PackageVersion Include="FluentAvaloniaUI" Version="2.0.1" />
     <PackageVersion Include="GtkSharp.Dependencies" Version="1.1.1" />
     <PackageVersion Include="GtkSharp.Dependencies.osx" Version="0.0.5" />
-    <PackageVersion Include="jp2masa.Avalonia.Flexbox" Version="0.2.0" />
+    <PackageVersion Include="jp2masa.Avalonia.Flexbox" Version="0.3.0-beta.4" />
     <PackageVersion Include="LibHac" Version="0.18.0" />
     <PackageVersion Include="Microsoft.CodeAnalysis.Analyzers" Version="3.3.4" />
-    <PackageVersion Include="Microsoft.CodeAnalysis.CSharp" Version="4.5.0" />
-    <PackageVersion Include="Microsoft.NET.Test.Sdk" Version="17.6.2" />
+    <PackageVersion Include="Microsoft.CodeAnalysis.CSharp" Version="4.6.0" />
+    <PackageVersion Include="Microsoft.NET.Test.Sdk" Version="17.6.3" />
     <PackageVersion Include="Microsoft.IO.RecyclableMemoryStream" Version="2.3.2" />
     <PackageVersion Include="MsgPack.Cli" Version="1.0.1" />
     <PackageVersion Include="NUnit" Version="3.13.3" />
@@ -34,7 +34,7 @@
     <PackageVersion Include="Ryujinx.Graphics.Nvdec.Dependencies" Version="5.0.1-build13" />
     <PackageVersion Include="Ryujinx.Graphics.Vulkan.Dependencies.MoltenVK" Version="1.2.0" />
     <PackageVersion Include="Ryujinx.GtkSharp" Version="3.24.24.59-ryujinx" />
-    <PackageVersion Include="Ryujinx.SDL2-CS" Version="2.26.3-build25" />
+    <PackageVersion Include="Ryujinx.SDL2-CS" Version="2.28.1-build28" />
     <PackageVersion Include="shaderc.net" Version="0.1.0" />
     <PackageVersion Include="SharpZipLib" Version="1.4.2" />
     <PackageVersion Include="Silk.NET.Vulkan" Version="2.16.0" />
@@ -48,6 +48,5 @@
     <PackageVersion Include="System.IO.Hashing" Version="7.0.0" />
     <PackageVersion Include="System.Management" Version="7.0.2" />
     <PackageVersion Include="UnicornEngine.Unicorn" Version="2.0.2-rc1-fb78016" />
-    <PackageVersion Include="XamlNameReferenceGenerator" Version="1.6.1" />
   </ItemGroup>
 </Project>

distribution/macos/Info.plist

@@ -44,10 +44,115 @@
     <string>public.app-category.games</string>
     <key>LSMinimumSystemVersion</key>
     <string>11.0</string>
+    <key>UTExportedTypeDeclarations</key>
+    <array>
+      <dict>
+        <key>UTTypeDescription</key>
+        <string>Extensible Application Markup Language</string>
+        <key>UTTypeConformsTo</key>
+        <array>
+          <string>public.xml</string>
+        </array>
+        <key>UTTypeIdentifier</key>
+        <string>com.ryujinx.xaml</string>
+        <key>UTTypeTagSpecification</key>
+        <dict>
+          <key>public.filename-extension</key>
+          <array>
+            <string>xaml</string>
+          </array>
+        </dict>
+      </dict>
+      <dict>
+        <key>UTTypeDescription</key>
+        <string>Nintendo Submission Package</string>
+        <key>UTTypeConformsTo</key>
+        <array>
+          <string>public.data</string>
+        </array>
+        <key>UTTypeIdentifier</key>
+        <string>com.ryujinx.nsp</string>
+        <key>UTTypeTagSpecification</key>
+        <dict>
+          <key>public.filename-extension</key>
+          <array>
+            <string>nsp</string>
+          </array>
+        </dict>
+      </dict>
+      <dict>
+        <key>UTTypeDescription</key>
+        <string>Nintendo Switch Cartridge</string>
+        <key>UTTypeConformsTo</key>
+        <array>
+          <string>public.data</string>
+        </array>
+        <key>UTTypeIdentifier</key>
+        <string>com.ryujinx.xci</string>
+        <key>UTTypeTagSpecification</key>
+        <dict>
+          <key>public.filename-extension</key>
+          <array>
+            <string>xci</string>
+          </array>
+        </dict>
+      </dict>
+      <dict>
+        <key>UTTypeDescription</key>
+        <string>Nintendo Content Archive</string>
+        <key>UTTypeConformsTo</key>
+        <array>
+          <string>public.data</string>
+        </array>
+        <key>UTTypeIdentifier</key>
+        <string>com.ryujinx.nca</string>
+        <key>UTTypeTagSpecification</key>
+        <dict>
+          <key>public.filename-extension</key>
+          <array>
+            <string>nca</string>
+          </array>
+        </dict>
+      </dict>
+      <dict>
+        <key>UTTypeDescription</key>
+        <string>Nintendo Relocatable Object</string>
+        <key>UTTypeConformsTo</key>
+        <array>
+          <string>public.data</string>
+        </array>
+        <key>UTTypeIdentifier</key>
+        <string>com.ryujinx.nro</string>
+        <key>UTTypeTagSpecification</key>
+        <dict>
+          <key>public.filename-extension</key>
+          <array>
+            <string>nro</string>
+          </array>
+        </dict>
+      </dict>
+      <dict>
+        <key>UTTypeDescription</key>
+        <string>Nintendo Shared Object</string>
+        <key>UTTypeConformsTo</key>
+        <array>
+          <string>public.data</string>
+        </array>
+        <key>UTTypeIdentifier</key>
+        <string>com.ryujinx.nso</string>
+        <key>UTTypeTagSpecification</key>
+        <dict>
+          <key>public.filename-extension</key>
+          <array>
+            <string>nso</string>
+          </array>
+        </dict>
+      </dict>
+    </array>
     <key>LSEnvironment</key>
     <dict>
-        <key>COMPlus_DefaultStackSize</key>
+        <key>DOTNET_DefaultStackSize</key>
         <string>200000</string>
     </dict>
 </dict>
-</plist>
+</plist>

distribution/macos/create_macos_build.sh

@@ -35,12 +35,12 @@ EXECUTABLE_SUB_PATH=Contents/MacOS/Ryujinx
 rm -rf "$TEMP_DIRECTORY"
 mkdir -p "$TEMP_DIRECTORY"
 
-DOTNET_COMMON_ARGS="-p:DebugType=embedded -p:Version=$VERSION -p:SourceRevisionId=$SOURCE_REVISION_ID --self-contained true $EXTRA_ARGS"
+DOTNET_COMMON_ARGS=(-p:DebugType=embedded -p:Version="$VERSION" -p:SourceRevisionId="$SOURCE_REVISION_ID" --self-contained true $EXTRA_ARGS)
 
 dotnet restore
-dotnet build -c $CONFIGURATION src/Ryujinx.Ava
-dotnet publish -c $CONFIGURATION -r osx-arm64 -o "$TEMP_DIRECTORY/publish_arm64" $DOTNET_COMMON_ARGS src/Ryujinx.Ava
-dotnet publish -c $CONFIGURATION -r osx-x64 -o "$TEMP_DIRECTORY/publish_x64" $DOTNET_COMMON_ARGS src/Ryujinx.Ava
+dotnet build -c "$CONFIGURATION" src/Ryujinx.Ava
+dotnet publish -c "$CONFIGURATION" -r osx-arm64 -o "$TEMP_DIRECTORY/publish_arm64" "${DOTNET_COMMON_ARGS[@]}" src/Ryujinx.Ava
+dotnet publish -c "$CONFIGURATION" -r osx-x64 -o "$TEMP_DIRECTORY/publish_x64" "${DOTNET_COMMON_ARGS[@]}" src/Ryujinx.Ava
 
 # Get rid of the support library for ARMeilleure for x64 (that's only for arm64)
 rm -rf "$TEMP_DIRECTORY/publish_x64/libarmeilleure-jitsupport.dylib"
@@ -104,10 +104,10 @@ fi
 
 echo "Creating archive"
 pushd "$OUTPUT_DIRECTORY"
-tar --exclude "Ryujinx.app/Contents/MacOS/Ryujinx" -cvf $RELEASE_TAR_FILE_NAME Ryujinx.app 1> /dev/null
-python3 "$BASE_DIR/distribution/misc/add_tar_exec.py" $RELEASE_TAR_FILE_NAME "Ryujinx.app/Contents/MacOS/Ryujinx" "Ryujinx.app/Contents/MacOS/Ryujinx"
-gzip -9 < $RELEASE_TAR_FILE_NAME > $RELEASE_TAR_FILE_NAME.gz
-rm $RELEASE_TAR_FILE_NAME
+tar --exclude "Ryujinx.app/Contents/MacOS/Ryujinx" -cvf "$RELEASE_TAR_FILE_NAME" Ryujinx.app 1> /dev/null
+python3 "$BASE_DIR/distribution/misc/add_tar_exec.py" "$RELEASE_TAR_FILE_NAME" "Ryujinx.app/Contents/MacOS/Ryujinx" "Ryujinx.app/Contents/MacOS/Ryujinx"
+gzip -9 < "$RELEASE_TAR_FILE_NAME" > "$RELEASE_TAR_FILE_NAME.gz"
+rm "$RELEASE_TAR_FILE_NAME"
 popd
 
 echo "Done"

distribution/macos/updater.sh

@@ -5,7 +5,7 @@ set -e
 INSTALL_DIRECTORY=$1
 NEW_APP_DIRECTORY=$2
 APP_PID=$3
-APP_ARGUMENTS="${@:4}"
+APP_ARGUMENTS=("${@:4}")
 
 error_handler() {
     local lineno="$1"
@@ -33,7 +33,7 @@ trap 'error_handler ${LINENO}' ERR
 
 attempt=0
 while true; do
-    if lsof -p $APP_PID +r 1 &>/dev/null || ps -p "$APP_PID" &>/dev/null; then
+    if lsof -p "$APP_PID" +r 1 &>/dev/null || ps -p "$APP_PID" &>/dev/null; then
         if [ "$attempt" -eq 4 ]; then
             exit 1
         fi
@@ -53,5 +53,5 @@ mv "$NEW_APP_DIRECTORY" "$INSTALL_DIRECTORY"
 if [ "$#" -le 3 ]; then
     open -a "$INSTALL_DIRECTORY"
 else
-    open -a "$INSTALL_DIRECTORY" --args "$APP_ARGUMENTS"
-fi
+    open -a "$INSTALL_DIRECTORY" --args "${APP_ARGUMENTS[@]}"
+fi

src/ARMeilleure/CodeGen/X86/CodeGenerator.cs

@@ -1296,11 +1296,11 @@ namespace ARMeilleure.CodeGen.X86
                 }
                 else
                 {
-                    const byte mask = 0b01_00_11_10;
+                    const byte Mask = 0b01_00_11_10;
 
-                    context.Assembler.Pshufd(src1, src1, mask);
+                    context.Assembler.Pshufd(src1, src1, Mask);
                     context.Assembler.Movq(dest, src1);
-                    context.Assembler.Pshufd(src1, src1, mask);
+                    context.Assembler.Pshufd(src1, src1, Mask);
                 }
             }
             else
@@ -1853,9 +1853,9 @@ namespace ARMeilleure.CodeGen.X86
             // that the OS will map all pages that we'll use. We do that by
             // doing a dummy read on those pages, forcing a page fault and
             // the OS to map them. If they are already mapped, nothing happens.
-            const int pageMask = PageSize - 1;
+            const int PageMask = PageSize - 1;
 
-            size = (size + pageMask) & ~pageMask;
+            size = (size + PageMask) & ~PageMask;
 
             Operand rsp = Register(X86Register.Rsp);
             Operand temp = Register(CallingConvention.GetIntReturnRegister());

src/ARMeilleure/Decoders/Decoder.cs

@@ -304,9 +304,9 @@ namespace ARMeilleure.Decoders
                 }
                 else if (opCode is IOpCode32MemMult opMemMult)
                 {
-                    const int pcMask = 1 << RegisterAlias.Aarch32Pc;
+                    const int PCMask = 1 << RegisterAlias.Aarch32Pc;
 
-                    rt = (opMemMult.RegisterMask & pcMask) != 0 ? RegisterAlias.Aarch32Pc : 0;
+                    rt = (opMemMult.RegisterMask & PCMask) != 0 ? RegisterAlias.Aarch32Pc : 0;
                     rn = opMemMult.Rn;
                     wBack = opMemMult.PostOffset != 0;
                     isLoad = opMemMult.IsLoad;

src/ARMeilleure/Decoders/OpCode32SimdCvtFFixed.cs

@@ -0,0 +1,23 @@
+namespace ARMeilleure.Decoders
+{
+    class OpCode32SimdCvtFFixed : OpCode32Simd
+    {
+        public int Fbits { get; protected set; }
+
+        public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCode32SimdCvtFFixed(inst, address, opCode, false);
+        public new static OpCode CreateT32(InstDescriptor inst, ulong address, int opCode) => new OpCode32SimdCvtFFixed(inst, address, opCode, true);
+
+        public OpCode32SimdCvtFFixed(InstDescriptor inst, ulong address, int opCode, bool isThumb) : base(inst, address, opCode, isThumb)
+        {
+            Opc = (opCode >> 8) & 0x1;
+
+            Size = Opc == 1 ? 0 : 2;
+            Fbits = 64 - ((opCode >> 16) & 0x3f);
+
+            if (DecoderHelper.VectorArgumentsInvalid(Q, Vd, Vm))
+            {
+                Instruction = InstDescriptor.Undefined;
+            }
+        }
+    }
+}

src/ARMeilleure/Decoders/OpCodeTable.cs

@@ -330,6 +330,7 @@ namespace ARMeilleure.Decoders
             SetA64("011111100x110000110010xxxxxxxxxx", InstName.Fmaxnmp_S,       InstEmit.Fmaxnmp_S,       OpCodeSimd.Create);
             SetA64("0>1011100<1xxxxx110001xxxxxxxxxx", InstName.Fmaxnmp_V,       InstEmit.Fmaxnmp_V,       OpCodeSimdReg.Create);
             SetA64("0110111000110000110010xxxxxxxxxx", InstName.Fmaxnmv_V,       InstEmit.Fmaxnmv_V,       OpCodeSimd.Create);
+            SetA64("011111100x110000111110xxxxxxxxxx", InstName.Fmaxp_S,         InstEmit.Fmaxp_S,         OpCodeSimd.Create);
             SetA64("0>1011100<1xxxxx111101xxxxxxxxxx", InstName.Fmaxp_V,         InstEmit.Fmaxp_V,         OpCodeSimdReg.Create);
             SetA64("0110111000110000111110xxxxxxxxxx", InstName.Fmaxv_V,         InstEmit.Fmaxv_V,         OpCodeSimd.Create);
             SetA64("000111100x1xxxxx010110xxxxxxxxxx", InstName.Fmin_S,          InstEmit.Fmin_S,          OpCodeSimdReg.Create);
@@ -339,6 +340,7 @@ namespace ARMeilleure.Decoders
             SetA64("011111101x110000110010xxxxxxxxxx", InstName.Fminnmp_S,       InstEmit.Fminnmp_S,       OpCodeSimd.Create);
             SetA64("0>1011101<1xxxxx110001xxxxxxxxxx", InstName.Fminnmp_V,       InstEmit.Fminnmp_V,       OpCodeSimdReg.Create);
             SetA64("0110111010110000110010xxxxxxxxxx", InstName.Fminnmv_V,       InstEmit.Fminnmv_V,       OpCodeSimd.Create);
+            SetA64("011111101x110000111110xxxxxxxxxx", InstName.Fminp_S,         InstEmit.Fminp_S,         OpCodeSimd.Create);
             SetA64("0>1011101<1xxxxx111101xxxxxxxxxx", InstName.Fminp_V,         InstEmit.Fminp_V,         OpCodeSimdReg.Create);
             SetA64("0110111010110000111110xxxxxxxxxx", InstName.Fminv_V,         InstEmit.Fminv_V,         OpCodeSimd.Create);
             SetA64("010111111xxxxxxx0001x0xxxxxxxxxx", InstName.Fmla_Se,         InstEmit.Fmla_Se,         OpCodeSimdRegElemF.Create);
@@ -883,174 +885,175 @@ namespace ARMeilleure.Decoders
             SetVfp("<<<<11100x11xxxxxxxx101xx1x0xxxx", InstName.Vsub,   InstEmit32.Vsub_S,   OpCode32SimdRegS.Create,        OpCode32SimdRegS.CreateT32);
 
             // ASIMD
-            SetAsimd("111100111x110000xxx0001101x0xxx0", InstName.Aesd_V,      InstEmit32.Aesd_V,      OpCode32Simd.Create,            OpCode32Simd.CreateT32);
-            SetAsimd("111100111x110000xxx0001100x0xxx0", InstName.Aese_V,      InstEmit32.Aese_V,      OpCode32Simd.Create,            OpCode32Simd.CreateT32);
-            SetAsimd("111100111x110000xxx0001111x0xxx0", InstName.Aesimc_V,    InstEmit32.Aesimc_V,    OpCode32Simd.Create,            OpCode32Simd.CreateT32);
-            SetAsimd("111100111x110000xxx0001110x0xxx0", InstName.Aesmc_V,     InstEmit32.Aesmc_V,     OpCode32Simd.Create,            OpCode32Simd.CreateT32);
-            SetAsimd("111100110x00xxx0xxx01100x1x0xxx0", InstName.Sha256h_V,   InstEmit32.Sha256h_V,   OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
-            SetAsimd("111100110x01xxx0xxx01100x1x0xxx0", InstName.Sha256h2_V,  InstEmit32.Sha256h2_V,  OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
-            SetAsimd("111100111x111010xxx0001111x0xxx0", InstName.Sha256su0_V, InstEmit32.Sha256su0_V, OpCode32Simd.Create,            OpCode32Simd.CreateT32);
-            SetAsimd("111100110x10xxx0xxx01100x1x0xxx0", InstName.Sha256su1_V, InstEmit32.Sha256su1_V, OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
-            SetAsimd("1111001x0x<<xxxxxxxx0111xxx0xxxx", InstName.Vabd,        InstEmit32.Vabd_I,      OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
-            SetAsimd("1111001x1x<<xxxxxxxx0111x0x0xxxx", InstName.Vabdl,       InstEmit32.Vabdl_I,     OpCode32SimdRegLong.Create,     OpCode32SimdRegLong.CreateT32);
-            SetAsimd("111100111x11<<01xxxx00110xx0xxxx", InstName.Vabs,        InstEmit32.Vabs_V,      OpCode32SimdCmpZ.Create,        OpCode32SimdCmpZ.CreateT32);
-            SetAsimd("111100111x111001xxxx01110xx0xxxx", InstName.Vabs,        InstEmit32.Vabs_V,      OpCode32SimdCmpZ.Create,        OpCode32SimdCmpZ.CreateT32);
-            SetAsimd("111100100xxxxxxxxxxx1000xxx0xxxx", InstName.Vadd,        InstEmit32.Vadd_I,      OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
-            SetAsimd("111100100x00xxxxxxxx1101xxx0xxxx", InstName.Vadd,        InstEmit32.Vadd_V,      OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
-            SetAsimd("1111001x1x<<xxxxxxx00000x0x0xxxx", InstName.Vaddl,       InstEmit32.Vaddl_I,     OpCode32SimdRegLong.Create,     OpCode32SimdRegLong.CreateT32);
-            SetAsimd("1111001x1x<<xxxxxxx00001x0x0xxxx", InstName.Vaddw,       InstEmit32.Vaddw_I,     OpCode32SimdRegWide.Create,     OpCode32SimdRegWide.CreateT32);
-            SetAsimd("111100100x00xxxxxxxx0001xxx1xxxx", InstName.Vand,        InstEmit32.Vand_I,      OpCode32SimdBinary.Create,      OpCode32SimdBinary.CreateT32);
-            SetAsimd("111100100x01xxxxxxxx0001xxx1xxxx", InstName.Vbic,        InstEmit32.Vbic_I,      OpCode32SimdBinary.Create,      OpCode32SimdBinary.CreateT32);
-            SetAsimd("1111001x1x000xxxxxxx<<x10x11xxxx", InstName.Vbic,        InstEmit32.Vbic_II,     OpCode32SimdImm.Create,         OpCode32SimdImm.CreateT32);
-            SetAsimd("111100110x11xxxxxxxx0001xxx1xxxx", InstName.Vbif,        InstEmit32.Vbif,        OpCode32SimdBinary.Create,      OpCode32SimdBinary.CreateT32);
-            SetAsimd("111100110x10xxxxxxxx0001xxx1xxxx", InstName.Vbit,        InstEmit32.Vbit,        OpCode32SimdBinary.Create,      OpCode32SimdBinary.CreateT32);
-            SetAsimd("111100110x01xxxxxxxx0001xxx1xxxx", InstName.Vbsl,        InstEmit32.Vbsl,        OpCode32SimdBinary.Create,      OpCode32SimdBinary.CreateT32);
-            SetAsimd("111100110x<<xxxxxxxx1000xxx1xxxx", InstName.Vceq,        InstEmit32.Vceq_I,      OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
-            SetAsimd("111100100x00xxxxxxxx1110xxx0xxxx", InstName.Vceq,        InstEmit32.Vceq_V,      OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
-            SetAsimd("111100111x11xx01xxxx0x010xx0xxxx", InstName.Vceq,        InstEmit32.Vceq_Z,      OpCode32SimdCmpZ.Create,        OpCode32SimdCmpZ.CreateT32);
-            SetAsimd("1111001x0x<<xxxxxxxx0011xxx1xxxx", InstName.Vcge,        InstEmit32.Vcge_I,      OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
-            SetAsimd("111100110x00xxxxxxxx1110xxx0xxxx", InstName.Vcge,        InstEmit32.Vcge_V,      OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
-            SetAsimd("111100111x11xx01xxxx0x001xx0xxxx", InstName.Vcge,        InstEmit32.Vcge_Z,      OpCode32SimdCmpZ.Create,        OpCode32SimdCmpZ.CreateT32);
-            SetAsimd("1111001x0x<<xxxxxxxx0011xxx0xxxx", InstName.Vcgt,        InstEmit32.Vcgt_I,      OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
-            SetAsimd("111100110x10xxxxxxxx1110xxx0xxxx", InstName.Vcgt,        InstEmit32.Vcgt_V,      OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
-            SetAsimd("111100111x11xx01xxxx0x000xx0xxxx", InstName.Vcgt,        InstEmit32.Vcgt_Z,      OpCode32SimdCmpZ.Create,        OpCode32SimdCmpZ.CreateT32);
-            SetAsimd("111100111x11xx01xxxx0x011xx0xxxx", InstName.Vcle,        InstEmit32.Vcle_Z,      OpCode32SimdCmpZ.Create,        OpCode32SimdCmpZ.CreateT32);
-            SetAsimd("111100111x11xx01xxxx0x100xx0xxxx", InstName.Vclt,        InstEmit32.Vclt_Z,      OpCode32SimdCmpZ.Create,        OpCode32SimdCmpZ.CreateT32);
-            SetAsimd("111100111x110000xxxx01010xx0xxxx", InstName.Vcnt,        InstEmit32.Vcnt,        OpCode32SimdCmpZ.Create,        OpCode32SimdCmpZ.CreateT32);
-            SetAsimd("111100111x111011xxxx011xxxx0xxxx", InstName.Vcvt,        InstEmit32.Vcvt_V,      OpCode32SimdCmpZ.Create,        OpCode32SimdCmpZ.CreateT32); // FP and integer, vector.
-            SetAsimd("111100111x11xxxxxxxx11000xx0xxxx", InstName.Vdup,        InstEmit32.Vdup_1,      OpCode32SimdDupElem.Create,     OpCode32SimdDupElem.CreateT32);
-            SetAsimd("111100110x00xxxxxxxx0001xxx1xxxx", InstName.Veor,        InstEmit32.Veor_I,      OpCode32SimdBinary.Create,      OpCode32SimdBinary.CreateT32);
-            SetAsimd("111100101x11xxxxxxxxxxxxxxx0xxxx", InstName.Vext,        InstEmit32.Vext,        OpCode32SimdExt.Create,         OpCode32SimdExt.CreateT32);
-            SetAsimd("111100100x00xxxxxxxx1100xxx1xxxx", InstName.Vfma,        InstEmit32.Vfma_V,      OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
-            SetAsimd("111100100x10xxxxxxxx1100xxx1xxxx", InstName.Vfms,        InstEmit32.Vfms_V,      OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
-            SetAsimd("1111001x0x<<xxxxxxxx0000xxx0xxxx", InstName.Vhadd,       InstEmit32.Vhadd,       OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
-            SetAsimd("111101001x10xxxxxxxx0000xxx0xxxx", InstName.Vld1,        InstEmit32.Vld1,        OpCode32SimdMemSingle.Create,   OpCode32SimdMemSingle.CreateT32);
-            SetAsimd("111101001x10xxxxxxxx0100xx0xxxxx", InstName.Vld1,        InstEmit32.Vld1,        OpCode32SimdMemSingle.Create,   OpCode32SimdMemSingle.CreateT32);
-            SetAsimd("111101001x10xxxxxxxx1000x000xxxx", InstName.Vld1,        InstEmit32.Vld1,        OpCode32SimdMemSingle.Create,   OpCode32SimdMemSingle.CreateT32);
-            SetAsimd("111101001x10xxxxxxxx1000x011xxxx", InstName.Vld1,        InstEmit32.Vld1,        OpCode32SimdMemSingle.Create,   OpCode32SimdMemSingle.CreateT32);
-            SetAsimd("111101001x10xxxxxxxx110000x0xxxx", InstName.Vld1,        InstEmit32.Vld1,        OpCode32SimdMemSingle.Create,   OpCode32SimdMemSingle.CreateT32);
-            SetAsimd("111101001x10xxxxxxxx110001xxxxxx", InstName.Vld1,        InstEmit32.Vld1,        OpCode32SimdMemSingle.Create,   OpCode32SimdMemSingle.CreateT32);
-            SetAsimd("111101001x10xxxxxxxx110010xxxxxx", InstName.Vld1,        InstEmit32.Vld1,        OpCode32SimdMemSingle.Create,   OpCode32SimdMemSingle.CreateT32);
-            SetAsimd("111101000x10xxxxxxxx0111xx0xxxxx", InstName.Vld1,        InstEmit32.Vld1,        OpCode32SimdMemPair.Create,     OpCode32SimdMemPair.CreateT32); // Regs = 1.
-            SetAsimd("111101000x10xxxxxxxx1010xx<<xxxx", InstName.Vld1,        InstEmit32.Vld1,        OpCode32SimdMemPair.Create,     OpCode32SimdMemPair.CreateT32); // Regs = 2.
-            SetAsimd("111101000x10xxxxxxxx0110xx0xxxxx", InstName.Vld1,        InstEmit32.Vld1,        OpCode32SimdMemPair.Create,     OpCode32SimdMemPair.CreateT32); // Regs = 3.
-            SetAsimd("111101000x10xxxxxxxx0010xxxxxxxx", InstName.Vld1,        InstEmit32.Vld1,        OpCode32SimdMemPair.Create,     OpCode32SimdMemPair.CreateT32); // Regs = 4.
-            SetAsimd("111101001x10xxxxxxxx0x01xxxxxxxx", InstName.Vld2,        InstEmit32.Vld2,        OpCode32SimdMemSingle.Create,   OpCode32SimdMemSingle.CreateT32);
-            SetAsimd("111101001x10xxxxxxxx1001xx0xxxxx", InstName.Vld2,        InstEmit32.Vld2,        OpCode32SimdMemSingle.Create,   OpCode32SimdMemSingle.CreateT32);
-            SetAsimd("111101001x10xxxxxxxx1101<<xxxxxx", InstName.Vld2,        InstEmit32.Vld2,        OpCode32SimdMemSingle.Create,   OpCode32SimdMemSingle.CreateT32);
-            SetAsimd("111101000x10xxxxxxxx100x<<0xxxxx", InstName.Vld2,        InstEmit32.Vld2,        OpCode32SimdMemPair.Create,     OpCode32SimdMemPair.CreateT32); // Regs = 1, inc = 1/2 (itype).
-            SetAsimd("111101000x10xxxxxxxx100x<<10xxxx", InstName.Vld2,        InstEmit32.Vld2,        OpCode32SimdMemPair.Create,     OpCode32SimdMemPair.CreateT32); // Regs = 1, inc = 1/2 (itype).
-            SetAsimd("111101000x10xxxxxxxx0011<<xxxxxx", InstName.Vld2,        InstEmit32.Vld2,        OpCode32SimdMemPair.Create,     OpCode32SimdMemPair.CreateT32); // Regs = 2, inc = 2.
-            SetAsimd("111101001x10xxxxxxxx0x10xxx0xxxx", InstName.Vld3,        InstEmit32.Vld3,        OpCode32SimdMemSingle.Create,   OpCode32SimdMemSingle.CreateT32);
-            SetAsimd("111101001x10xxxxxxxx1010xx00xxxx", InstName.Vld3,        InstEmit32.Vld3,        OpCode32SimdMemSingle.Create,   OpCode32SimdMemSingle.CreateT32);
-            SetAsimd("111101001x10xxxxxxxx1110<<x0xxxx", InstName.Vld3,        InstEmit32.Vld3,        OpCode32SimdMemSingle.Create,   OpCode32SimdMemSingle.CreateT32);
-            SetAsimd("111101000x10xxxxxxxx010x<<0xxxxx", InstName.Vld3,        InstEmit32.Vld3,        OpCode32SimdMemPair.Create,     OpCode32SimdMemPair.CreateT32); // Inc = 1/2 (itype).
-            SetAsimd("111101001x10xxxxxxxx0x11xxxxxxxx", InstName.Vld4,        InstEmit32.Vld4,        OpCode32SimdMemSingle.Create,   OpCode32SimdMemSingle.CreateT32);
-            SetAsimd("111101001x10xxxxxxxx1011xx<<xxxx", InstName.Vld4,        InstEmit32.Vld4,        OpCode32SimdMemSingle.Create,   OpCode32SimdMemSingle.CreateT32);
-            SetAsimd("111101001x10xxxxxxxx1111<<x>xxxx", InstName.Vld4,        InstEmit32.Vld4,        OpCode32SimdMemSingle.Create,   OpCode32SimdMemSingle.CreateT32);
-            SetAsimd("111101000x10xxxxxxxx000x<<xxxxxx", InstName.Vld4,        InstEmit32.Vld4,        OpCode32SimdMemPair.Create,     OpCode32SimdMemPair.CreateT32); // Inc = 1/2 (itype).
-            SetAsimd("1111001x0x<<xxxxxxxx0110xxx0xxxx", InstName.Vmax,        InstEmit32.Vmax_I,      OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
-            SetAsimd("111100100x00xxxxxxxx1111xxx0xxxx", InstName.Vmax,        InstEmit32.Vmax_V,      OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
-            SetAsimd("1111001x0x<<xxxxxxxx0110xxx1xxxx", InstName.Vmin,        InstEmit32.Vmin_I,      OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
-            SetAsimd("111100100x10xxxxxxxx1111xxx0xxxx", InstName.Vmin,        InstEmit32.Vmin_V,      OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
-            SetAsimd("111100110x0xxxxxxxxx1111xxx1xxxx", InstName.Vmaxnm,      InstEmit32.Vmaxnm_V,    OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
-            SetAsimd("111100110x1xxxxxxxxx1111xxx1xxxx", InstName.Vminnm,      InstEmit32.Vminnm_V,    OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
-            SetAsimd("1111001x1x<<xxxxxxxx000xx1x0xxxx", InstName.Vmla,        InstEmit32.Vmla_1,      OpCode32SimdRegElem.Create,     OpCode32SimdRegElem.CreateT32);
-            SetAsimd("111100100xxxxxxxxxxx1001xxx0xxxx", InstName.Vmla,        InstEmit32.Vmla_I,      OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
-            SetAsimd("111100100x00xxxxxxxx1101xxx1xxxx", InstName.Vmla,        InstEmit32.Vmla_V,      OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
-            SetAsimd("1111001x1x<<xxxxxxx01000x0x0xxxx", InstName.Vmlal,       InstEmit32.Vmlal_I,     OpCode32SimdRegLong.Create,     OpCode32SimdRegLong.CreateT32);
-            SetAsimd("1111001x1x<<xxxxxxxx010xx1x0xxxx", InstName.Vmls,        InstEmit32.Vmls_1,      OpCode32SimdRegElem.Create,     OpCode32SimdRegElem.CreateT32);
-            SetAsimd("111100100x10xxxxxxxx1101xxx1xxxx", InstName.Vmls,        InstEmit32.Vmls_V,      OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
-            SetAsimd("111100110xxxxxxxxxxx1001xxx0xxxx", InstName.Vmls,        InstEmit32.Vmls_I,      OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
-            SetAsimd("1111001x1x<<xxxxxxx01010x0x0xxxx", InstName.Vmlsl,       InstEmit32.Vmlsl_I,     OpCode32SimdRegLong.Create,     OpCode32SimdRegLong.CreateT32);
-            SetAsimd("1111001x1x000xxxxxxx0xx00x01xxxx", InstName.Vmov,        InstEmit32.Vmov_I,      OpCode32SimdImm.Create,         OpCode32SimdImm.CreateT32); // D/Q vector I32.
-            SetAsimd("1111001x1x000xxxxxxx10x00x01xxxx", InstName.Vmov,        InstEmit32.Vmov_I,      OpCode32SimdImm.Create,         OpCode32SimdImm.CreateT32); // D/Q I16.
-            SetAsimd("1111001x1x000xxxxxxx11xx0x01xxxx", InstName.Vmov,        InstEmit32.Vmov_I,      OpCode32SimdImm.Create,         OpCode32SimdImm.CreateT32); // D/Q (dt - from cmode).
-            SetAsimd("1111001x1x000xxxxxxx11100x11xxxx", InstName.Vmov,        InstEmit32.Vmov_I,      OpCode32SimdImm.Create,         OpCode32SimdImm.CreateT32); // D/Q I64.
-            SetAsimd("1111001x1x001000xxx0101000x1xxxx", InstName.Vmovl,       InstEmit32.Vmovl,       OpCode32SimdLong.Create,        OpCode32SimdLong.CreateT32);
-            SetAsimd("1111001x1x010000xxx0101000x1xxxx", InstName.Vmovl,       InstEmit32.Vmovl,       OpCode32SimdLong.Create,        OpCode32SimdLong.CreateT32);
-            SetAsimd("1111001x1x100000xxx0101000x1xxxx", InstName.Vmovl,       InstEmit32.Vmovl,       OpCode32SimdLong.Create,        OpCode32SimdLong.CreateT32);
-            SetAsimd("111100111x11<<10xxxx001000x0xxx0", InstName.Vmovn,       InstEmit32.Vmovn,       OpCode32SimdMovn.Create,        OpCode32SimdMovn.CreateT32);
-            SetAsimd("1111001x1x<<xxxxxxxx100xx1x0xxxx", InstName.Vmul,        InstEmit32.Vmul_1,      OpCode32SimdRegElem.Create,     OpCode32SimdRegElem.CreateT32);
-            SetAsimd("111100100x<<xxxxxxxx1001xxx1xxxx", InstName.Vmul,        InstEmit32.Vmul_I,      OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
-            SetAsimd("111100110x00xxxxxxxx1001xxx1xxxx", InstName.Vmul,        InstEmit32.Vmul_I,      OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
-            SetAsimd("111100110x00xxxxxxxx1101xxx1xxxx", InstName.Vmul,        InstEmit32.Vmul_V,      OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
-            SetAsimd("1111001x1x<<xxxxxxx01010x1x0xxxx", InstName.Vmull,       InstEmit32.Vmull_1,     OpCode32SimdRegElemLong.Create, OpCode32SimdRegElemLong.CreateT32);
-            SetAsimd("1111001x1x<<xxxxxxx01100x0x0xxxx", InstName.Vmull,       InstEmit32.Vmull_I,     OpCode32SimdRegLong.Create,     OpCode32SimdRegLong.CreateT32);
-            SetAsimd("111100101xx0xxxxxxx01110x0x0xxxx", InstName.Vmull,       InstEmit32.Vmull_I,     OpCode32SimdRegLong.Create,     OpCode32SimdRegLong.CreateT32); // P8/P64
-            SetAsimd("111100111x110000xxxx01011xx0xxxx", InstName.Vmvn,        InstEmit32.Vmvn_I,      OpCode32SimdBinary.Create,      OpCode32SimdBinary.CreateT32);
-            SetAsimd("1111001x1x000xxxxxxx0xx00x11xxxx", InstName.Vmvn,        InstEmit32.Vmvn_II,     OpCode32SimdImm.Create,         OpCode32SimdImm.CreateT32); // D/Q vector I32.
-            SetAsimd("1111001x1x000xxxxxxx10x00x11xxxx", InstName.Vmvn,        InstEmit32.Vmvn_II,     OpCode32SimdImm.Create,         OpCode32SimdImm.CreateT32);
-            SetAsimd("1111001x1x000xxxxxxx110x0x11xxxx", InstName.Vmvn,        InstEmit32.Vmvn_II,     OpCode32SimdImm.Create,         OpCode32SimdImm.CreateT32);
-            SetAsimd("111100111x11<<01xxxx00111xx0xxxx", InstName.Vneg,        InstEmit32.Vneg_V,      OpCode32SimdCmpZ.Create,        OpCode32SimdCmpZ.CreateT32);
-            SetAsimd("111100111x111001xxxx01111xx0xxxx", InstName.Vneg,        InstEmit32.Vneg_V,      OpCode32SimdCmpZ.Create,        OpCode32SimdCmpZ.CreateT32);
-            SetAsimd("111100100x11xxxxxxxx0001xxx1xxxx", InstName.Vorn,        InstEmit32.Vorn_I,      OpCode32SimdBinary.Create,      OpCode32SimdBinary.CreateT32);
-            SetAsimd("111100100x10xxxxxxxx0001xxx1xxxx", InstName.Vorr,        InstEmit32.Vorr_I,      OpCode32SimdBinary.Create,      OpCode32SimdBinary.CreateT32);
-            SetAsimd("1111001x1x000xxxxxxx<<x10x01xxxx", InstName.Vorr,        InstEmit32.Vorr_II,     OpCode32SimdImm.Create,         OpCode32SimdImm.CreateT32);
-            SetAsimd("111100100x<<xxxxxxxx1011x0x1xxxx", InstName.Vpadd,       InstEmit32.Vpadd_I,     OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
-            SetAsimd("111100110x00xxxxxxxx1101x0x0xxxx", InstName.Vpadd,       InstEmit32.Vpadd_V,     OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
-            SetAsimd("111100111x11<<00xxxx0010xxx0xxxx", InstName.Vpaddl,      InstEmit32.Vpaddl,      OpCode32SimdCmpZ.Create,        OpCode32SimdCmpZ.CreateT32);
-            SetAsimd("1111001x0x<<xxxxxxxx1010x0x0xxxx", InstName.Vpmax,       InstEmit32.Vpmax_I,     OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
-            SetAsimd("111100110x00xxxxxxxx1111x0x0xxxx", InstName.Vpmax,       InstEmit32.Vpmax_V,     OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
-            SetAsimd("1111001x0x<<xxxxxxxx1010x0x1xxxx", InstName.Vpmin,       InstEmit32.Vpmin_I,     OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
-            SetAsimd("111100110x10xxxxxxxx1111x0x0xxxx", InstName.Vpmin,       InstEmit32.Vpmin_V,     OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
-            SetAsimd("1111001x0xxxxxxxxxxx0000xxx1xxxx", InstName.Vqadd,       InstEmit32.Vqadd,       OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
-            SetAsimd("111100100x01xxxxxxxx1011xxx0xxxx", InstName.Vqdmulh,     InstEmit32.Vqdmulh,     OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
-            SetAsimd("111100100x10xxxxxxxx1011xxx0xxxx", InstName.Vqdmulh,     InstEmit32.Vqdmulh,     OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
-            SetAsimd("111100111x11<<10xxxx00101xx0xxx0", InstName.Vqmovn,      InstEmit32.Vqmovn,      OpCode32SimdMovn.Create,        OpCode32SimdMovn.CreateT32);
-            SetAsimd("111100111x11<<10xxxx001001x0xxx0", InstName.Vqmovun,     InstEmit32.Vqmovun,     OpCode32SimdMovn.Create,        OpCode32SimdMovn.CreateT32);
-            SetAsimd("1111001x1x>>>xxxxxxx100101x1xxx0", InstName.Vqrshrn,     InstEmit32.Vqrshrn,     OpCode32SimdShImmNarrow.Create, OpCode32SimdShImmNarrow.CreateT32);
-            SetAsimd("111100111x>>>xxxxxxx100001x1xxx0", InstName.Vqrshrun,    InstEmit32.Vqrshrun,    OpCode32SimdShImmNarrow.Create, OpCode32SimdShImmNarrow.CreateT32);
-            SetAsimd("1111001x1x>>>xxxxxxx100100x1xxx0", InstName.Vqshrn,      InstEmit32.Vqshrn,      OpCode32SimdShImmNarrow.Create, OpCode32SimdShImmNarrow.CreateT32);
-            SetAsimd("111100111x>>>xxxxxxx100000x1xxx0", InstName.Vqshrun,     InstEmit32.Vqshrun,     OpCode32SimdShImmNarrow.Create, OpCode32SimdShImmNarrow.CreateT32);
-            SetAsimd("1111001x0xxxxxxxxxxx0010xxx1xxxx", InstName.Vqsub,       InstEmit32.Vqsub,       OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
-            SetAsimd("111100111x111011xxxx010x0xx0xxxx", InstName.Vrecpe,      InstEmit32.Vrecpe,      OpCode32SimdSqrte.Create,       OpCode32SimdSqrte.CreateT32);
-            SetAsimd("111100100x00xxxxxxxx1111xxx1xxxx", InstName.Vrecps,      InstEmit32.Vrecps,      OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
-            SetAsimd("111100111x11xx00xxxx000<<xx0xxxx", InstName.Vrev,        InstEmit32.Vrev,        OpCode32SimdRev.Create,         OpCode32SimdRev.CreateT32);
-            SetAsimd("1111001x0x<<xxxxxxxx0001xxx0xxxx", InstName.Vrhadd,      InstEmit32.Vrhadd,      OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
-            SetAsimd("111100111x111010xxxx01010xx0xxxx", InstName.Vrinta,      InstEmit32.Vrinta_V,    OpCode32SimdCmpZ.Create,        OpCode32SimdCmpZ.CreateT32);
-            SetAsimd("111100111x111010xxxx01101xx0xxxx", InstName.Vrintm,      InstEmit32.Vrintm_V,    OpCode32SimdCmpZ.Create,        OpCode32SimdCmpZ.CreateT32);
-            SetAsimd("111100111x111010xxxx01000xx0xxxx", InstName.Vrintn,      InstEmit32.Vrintn_V,    OpCode32SimdCmpZ.Create,        OpCode32SimdCmpZ.CreateT32);
-            SetAsimd("111100111x111010xxxx01111xx0xxxx", InstName.Vrintp,      InstEmit32.Vrintp_V,    OpCode32SimdCmpZ.Create,        OpCode32SimdCmpZ.CreateT32);
-            SetAsimd("1111001x1x>>>xxxxxxx0010>xx1xxxx", InstName.Vrshr,       InstEmit32.Vrshr,       OpCode32SimdShImm.Create,       OpCode32SimdShImm.CreateT32);
-            SetAsimd("111100101x>>>xxxxxxx100001x1xxx0", InstName.Vrshrn,      InstEmit32.Vrshrn,      OpCode32SimdShImmNarrow.Create, OpCode32SimdShImmNarrow.CreateT32);
-            SetAsimd("111100111x111011xxxx010x1xx0xxxx", InstName.Vrsqrte,     InstEmit32.Vrsqrte,     OpCode32SimdSqrte.Create,       OpCode32SimdSqrte.CreateT32);
-            SetAsimd("111100100x10xxxxxxxx1111xxx1xxxx", InstName.Vrsqrts,     InstEmit32.Vrsqrts,     OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
-            SetAsimd("1111001x1x>>>xxxxxxx0011>xx1xxxx", InstName.Vrsra,       InstEmit32.Vrsra,       OpCode32SimdShImm.Create,       OpCode32SimdShImm.CreateT32);
-            SetAsimd("111100101x>>>xxxxxxx0101>xx1xxxx", InstName.Vshl,        InstEmit32.Vshl,        OpCode32SimdShImm.Create,       OpCode32SimdShImm.CreateT32);
-            SetAsimd("1111001x0xxxxxxxxxxx0100xxx0xxxx", InstName.Vshl,        InstEmit32.Vshl_I,      OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
-            SetAsimd("1111001x1x>>>xxxxxxx101000x1xxxx", InstName.Vshll,       InstEmit32.Vshll,       OpCode32SimdShImmLong.Create,   OpCode32SimdShImmLong.CreateT32); // A1 encoding.
-            SetAsimd("1111001x1x>>>xxxxxxx0000>xx1xxxx", InstName.Vshr,        InstEmit32.Vshr,        OpCode32SimdShImm.Create,       OpCode32SimdShImm.CreateT32);
-            SetAsimd("111100101x>>>xxxxxxx100000x1xxx0", InstName.Vshrn,       InstEmit32.Vshrn,       OpCode32SimdShImmNarrow.Create, OpCode32SimdShImmNarrow.CreateT32);
-            SetAsimd("1111001x1x>>>xxxxxxx0001>xx1xxxx", InstName.Vsra,        InstEmit32.Vsra,        OpCode32SimdShImm.Create,       OpCode32SimdShImm.CreateT32);
-            SetAsimd("111101001x00xxxxxxxx0000xxx0xxxx", InstName.Vst1,        InstEmit32.Vst1,        OpCode32SimdMemSingle.Create,   OpCode32SimdMemSingle.CreateT32);
-            SetAsimd("111101001x00xxxxxxxx0100xx0xxxxx", InstName.Vst1,        InstEmit32.Vst1,        OpCode32SimdMemSingle.Create,   OpCode32SimdMemSingle.CreateT32);
-            SetAsimd("111101001x00xxxxxxxx1000x000xxxx", InstName.Vst1,        InstEmit32.Vst1,        OpCode32SimdMemSingle.Create,   OpCode32SimdMemSingle.CreateT32);
-            SetAsimd("111101001x00xxxxxxxx1000x011xxxx", InstName.Vst1,        InstEmit32.Vst1,        OpCode32SimdMemSingle.Create,   OpCode32SimdMemSingle.CreateT32);
-            SetAsimd("111101000x00xxxxxxxx0111xx0xxxxx", InstName.Vst1,        InstEmit32.Vst1,        OpCode32SimdMemPair.Create,     OpCode32SimdMemPair.CreateT32); // Regs = 1.
-            SetAsimd("111101000x00xxxxxxxx1010xx<<xxxx", InstName.Vst1,        InstEmit32.Vst1,        OpCode32SimdMemPair.Create,     OpCode32SimdMemPair.CreateT32); // Regs = 2.
-            SetAsimd("111101000x00xxxxxxxx0110xx0xxxxx", InstName.Vst1,        InstEmit32.Vst1,        OpCode32SimdMemPair.Create,     OpCode32SimdMemPair.CreateT32); // Regs = 3.
-            SetAsimd("111101000x00xxxxxxxx0010xxxxxxxx", InstName.Vst1,        InstEmit32.Vst1,        OpCode32SimdMemPair.Create,     OpCode32SimdMemPair.CreateT32); // Regs = 4.
-            SetAsimd("111101001x00xxxxxxxx0x01xxxxxxxx", InstName.Vst2,        InstEmit32.Vst2,        OpCode32SimdMemSingle.Create,   OpCode32SimdMemSingle.CreateT32);
-            SetAsimd("111101001x00xxxxxxxx1001xx0xxxxx", InstName.Vst2,        InstEmit32.Vst2,        OpCode32SimdMemSingle.Create,   OpCode32SimdMemSingle.CreateT32);
-            SetAsimd("111101000x00xxxxxxxx100x<<0xxxxx", InstName.Vst2,        InstEmit32.Vst2,        OpCode32SimdMemPair.Create,     OpCode32SimdMemPair.CreateT32); // Regs = 1, inc = 1/2 (itype).
-            SetAsimd("111101000x00xxxxxxxx100x<<10xxxx", InstName.Vst2,        InstEmit32.Vst2,        OpCode32SimdMemPair.Create,     OpCode32SimdMemPair.CreateT32); // Regs = 1, inc = 1/2 (itype).
-            SetAsimd("111101000x00xxxxxxxx0011<<xxxxxx", InstName.Vst2,        InstEmit32.Vst2,        OpCode32SimdMemPair.Create,     OpCode32SimdMemPair.CreateT32); // Regs = 2, inc = 2.
-            SetAsimd("111101001x00xxxxxxxx0x10xxx0xxxx", InstName.Vst3,        InstEmit32.Vst3,        OpCode32SimdMemSingle.Create,   OpCode32SimdMemSingle.CreateT32);
-            SetAsimd("111101001x00xxxxxxxx1010xx00xxxx", InstName.Vst3,        InstEmit32.Vst3,        OpCode32SimdMemSingle.Create,   OpCode32SimdMemSingle.CreateT32);
-            SetAsimd("111101000x00xxxxxxxx010x<<0xxxxx", InstName.Vst3,        InstEmit32.Vst3,        OpCode32SimdMemPair.Create,     OpCode32SimdMemPair.CreateT32); // Inc = 1/2 (itype).
-            SetAsimd("111101001x00xxxxxxxx0x11xxxxxxxx", InstName.Vst4,        InstEmit32.Vst4,        OpCode32SimdMemSingle.Create,   OpCode32SimdMemSingle.CreateT32);
-            SetAsimd("111101001x00xxxxxxxx1011xx<<xxxx", InstName.Vst4,        InstEmit32.Vst4,        OpCode32SimdMemSingle.Create,   OpCode32SimdMemSingle.CreateT32);
-            SetAsimd("111101000x00xxxxxxxx000x<<xxxxxx", InstName.Vst4,        InstEmit32.Vst4,        OpCode32SimdMemPair.Create,     OpCode32SimdMemPair.CreateT32); // Inc = 1/2 (itype).
-            SetAsimd("111100110xxxxxxxxxxx1000xxx0xxxx", InstName.Vsub,        InstEmit32.Vsub_I,      OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
-            SetAsimd("111100100x10xxxxxxxx1101xxx0xxxx", InstName.Vsub,        InstEmit32.Vsub_V,      OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
-            SetAsimd("1111001x1x<<xxxxxxx00010x0x0xxxx", InstName.Vsubl,       InstEmit32.Vsubl_I,     OpCode32SimdRegLong.Create,     OpCode32SimdRegLong.CreateT32);
-            SetAsimd("1111001x1x<<xxxxxxx00011x0x0xxxx", InstName.Vsubw,       InstEmit32.Vsubw_I,     OpCode32SimdRegWide.Create,     OpCode32SimdRegWide.CreateT32);
-            SetAsimd("111100111x11xxxxxxxx10xxxxx0xxxx", InstName.Vtbl,        InstEmit32.Vtbl,        OpCode32SimdTbl.Create,         OpCode32SimdTbl.CreateT32);
-            SetAsimd("111100111x11<<10xxxx00001xx0xxxx", InstName.Vtrn,        InstEmit32.Vtrn,        OpCode32SimdCmpZ.Create,        OpCode32SimdCmpZ.CreateT32);
-            SetAsimd("111100100x<<xxxxxxxx1000xxx1xxxx", InstName.Vtst,        InstEmit32.Vtst,        OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
-            SetAsimd("111100111x11<<10xxxx00010xx0xxxx", InstName.Vuzp,        InstEmit32.Vuzp,        OpCode32SimdCmpZ.Create,        OpCode32SimdCmpZ.CreateT32);
-            SetAsimd("111100111x11<<10xxxx00011xx0xxxx", InstName.Vzip,        InstEmit32.Vzip,        OpCode32SimdCmpZ.Create,        OpCode32SimdCmpZ.CreateT32);
+            SetAsimd("111100111x110000xxx0001101x0xxx0", InstName.Aesd_V,      InstEmit32.Aesd_V,       OpCode32Simd.Create,            OpCode32Simd.CreateT32);
+            SetAsimd("111100111x110000xxx0001100x0xxx0", InstName.Aese_V,      InstEmit32.Aese_V,       OpCode32Simd.Create,            OpCode32Simd.CreateT32);
+            SetAsimd("111100111x110000xxx0001111x0xxx0", InstName.Aesimc_V,    InstEmit32.Aesimc_V,     OpCode32Simd.Create,            OpCode32Simd.CreateT32);
+            SetAsimd("111100111x110000xxx0001110x0xxx0", InstName.Aesmc_V,     InstEmit32.Aesmc_V,      OpCode32Simd.Create,            OpCode32Simd.CreateT32);
+            SetAsimd("111100110x00xxx0xxx01100x1x0xxx0", InstName.Sha256h_V,   InstEmit32.Sha256h_V,    OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
+            SetAsimd("111100110x01xxx0xxx01100x1x0xxx0", InstName.Sha256h2_V,  InstEmit32.Sha256h2_V,   OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
+            SetAsimd("111100111x111010xxx0001111x0xxx0", InstName.Sha256su0_V, InstEmit32.Sha256su0_V,  OpCode32Simd.Create,            OpCode32Simd.CreateT32);
+            SetAsimd("111100110x10xxx0xxx01100x1x0xxx0", InstName.Sha256su1_V, InstEmit32.Sha256su1_V,  OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
+            SetAsimd("1111001x0x<<xxxxxxxx0111xxx0xxxx", InstName.Vabd,        InstEmit32.Vabd_I,       OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
+            SetAsimd("1111001x1x<<xxxxxxxx0111x0x0xxxx", InstName.Vabdl,       InstEmit32.Vabdl_I,      OpCode32SimdRegLong.Create,     OpCode32SimdRegLong.CreateT32);
+            SetAsimd("111100111x11<<01xxxx00110xx0xxxx", InstName.Vabs,        InstEmit32.Vabs_V,       OpCode32SimdCmpZ.Create,        OpCode32SimdCmpZ.CreateT32);
+            SetAsimd("111100111x111001xxxx01110xx0xxxx", InstName.Vabs,        InstEmit32.Vabs_V,       OpCode32SimdCmpZ.Create,        OpCode32SimdCmpZ.CreateT32);
+            SetAsimd("111100100xxxxxxxxxxx1000xxx0xxxx", InstName.Vadd,        InstEmit32.Vadd_I,       OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
+            SetAsimd("111100100x00xxxxxxxx1101xxx0xxxx", InstName.Vadd,        InstEmit32.Vadd_V,       OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
+            SetAsimd("1111001x1x<<xxxxxxx00000x0x0xxxx", InstName.Vaddl,       InstEmit32.Vaddl_I,      OpCode32SimdRegLong.Create,     OpCode32SimdRegLong.CreateT32);
+            SetAsimd("1111001x1x<<xxxxxxx00001x0x0xxxx", InstName.Vaddw,       InstEmit32.Vaddw_I,      OpCode32SimdRegWide.Create,     OpCode32SimdRegWide.CreateT32);
+            SetAsimd("111100100x00xxxxxxxx0001xxx1xxxx", InstName.Vand,        InstEmit32.Vand_I,       OpCode32SimdBinary.Create,      OpCode32SimdBinary.CreateT32);
+            SetAsimd("111100100x01xxxxxxxx0001xxx1xxxx", InstName.Vbic,        InstEmit32.Vbic_I,       OpCode32SimdBinary.Create,      OpCode32SimdBinary.CreateT32);
+            SetAsimd("1111001x1x000xxxxxxx<<x10x11xxxx", InstName.Vbic,        InstEmit32.Vbic_II,      OpCode32SimdImm.Create,         OpCode32SimdImm.CreateT32);
+            SetAsimd("111100110x11xxxxxxxx0001xxx1xxxx", InstName.Vbif,        InstEmit32.Vbif,         OpCode32SimdBinary.Create,      OpCode32SimdBinary.CreateT32);
+            SetAsimd("111100110x10xxxxxxxx0001xxx1xxxx", InstName.Vbit,        InstEmit32.Vbit,         OpCode32SimdBinary.Create,      OpCode32SimdBinary.CreateT32);
+            SetAsimd("111100110x01xxxxxxxx0001xxx1xxxx", InstName.Vbsl,        InstEmit32.Vbsl,         OpCode32SimdBinary.Create,      OpCode32SimdBinary.CreateT32);
+            SetAsimd("111100110x<<xxxxxxxx1000xxx1xxxx", InstName.Vceq,        InstEmit32.Vceq_I,       OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
+            SetAsimd("111100100x00xxxxxxxx1110xxx0xxxx", InstName.Vceq,        InstEmit32.Vceq_V,       OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
+            SetAsimd("111100111x11xx01xxxx0x010xx0xxxx", InstName.Vceq,        InstEmit32.Vceq_Z,       OpCode32SimdCmpZ.Create,        OpCode32SimdCmpZ.CreateT32);
+            SetAsimd("1111001x0x<<xxxxxxxx0011xxx1xxxx", InstName.Vcge,        InstEmit32.Vcge_I,       OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
+            SetAsimd("111100110x00xxxxxxxx1110xxx0xxxx", InstName.Vcge,        InstEmit32.Vcge_V,       OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
+            SetAsimd("111100111x11xx01xxxx0x001xx0xxxx", InstName.Vcge,        InstEmit32.Vcge_Z,       OpCode32SimdCmpZ.Create,        OpCode32SimdCmpZ.CreateT32);
+            SetAsimd("1111001x0x<<xxxxxxxx0011xxx0xxxx", InstName.Vcgt,        InstEmit32.Vcgt_I,       OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
+            SetAsimd("111100110x10xxxxxxxx1110xxx0xxxx", InstName.Vcgt,        InstEmit32.Vcgt_V,       OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
+            SetAsimd("111100111x11xx01xxxx0x000xx0xxxx", InstName.Vcgt,        InstEmit32.Vcgt_Z,       OpCode32SimdCmpZ.Create,        OpCode32SimdCmpZ.CreateT32);
+            SetAsimd("111100111x11xx01xxxx0x011xx0xxxx", InstName.Vcle,        InstEmit32.Vcle_Z,       OpCode32SimdCmpZ.Create,        OpCode32SimdCmpZ.CreateT32);
+            SetAsimd("111100111x11xx01xxxx0x100xx0xxxx", InstName.Vclt,        InstEmit32.Vclt_Z,       OpCode32SimdCmpZ.Create,        OpCode32SimdCmpZ.CreateT32);
+            SetAsimd("111100111x110000xxxx01010xx0xxxx", InstName.Vcnt,        InstEmit32.Vcnt,         OpCode32SimdCmpZ.Create,        OpCode32SimdCmpZ.CreateT32);
+            SetAsimd("111100111x111011xxxx011xxxx0xxxx", InstName.Vcvt,        InstEmit32.Vcvt_V,       OpCode32SimdCmpZ.Create,        OpCode32SimdCmpZ.CreateT32); // FP and integer, vector.
+            SetAsimd("1111001x1x1xxxxxxxxx111x0xx1xxxx", InstName.Vcvt,        InstEmit32.Vcvt_V_Fixed, OpCode32SimdCvtFFixed.Create,   OpCode32SimdCvtFFixed.CreateT32); // Between floating point and fixed point, vector.
+            SetAsimd("111100111x11xxxxxxxx11000xx0xxxx", InstName.Vdup,        InstEmit32.Vdup_1,       OpCode32SimdDupElem.Create,     OpCode32SimdDupElem.CreateT32);
+            SetAsimd("111100110x00xxxxxxxx0001xxx1xxxx", InstName.Veor,        InstEmit32.Veor_I,       OpCode32SimdBinary.Create,      OpCode32SimdBinary.CreateT32);
+            SetAsimd("111100101x11xxxxxxxxxxxxxxx0xxxx", InstName.Vext,        InstEmit32.Vext,         OpCode32SimdExt.Create,         OpCode32SimdExt.CreateT32);
+            SetAsimd("111100100x00xxxxxxxx1100xxx1xxxx", InstName.Vfma,        InstEmit32.Vfma_V,       OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
+            SetAsimd("111100100x10xxxxxxxx1100xxx1xxxx", InstName.Vfms,        InstEmit32.Vfms_V,       OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
+            SetAsimd("1111001x0x<<xxxxxxxx0000xxx0xxxx", InstName.Vhadd,       InstEmit32.Vhadd,        OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
+            SetAsimd("111101001x10xxxxxxxx0000xxx0xxxx", InstName.Vld1,        InstEmit32.Vld1,         OpCode32SimdMemSingle.Create,   OpCode32SimdMemSingle.CreateT32);
+            SetAsimd("111101001x10xxxxxxxx0100xx0xxxxx", InstName.Vld1,        InstEmit32.Vld1,         OpCode32SimdMemSingle.Create,   OpCode32SimdMemSingle.CreateT32);
+            SetAsimd("111101001x10xxxxxxxx1000x000xxxx", InstName.Vld1,        InstEmit32.Vld1,         OpCode32SimdMemSingle.Create,   OpCode32SimdMemSingle.CreateT32);
+            SetAsimd("111101001x10xxxxxxxx1000x011xxxx", InstName.Vld1,        InstEmit32.Vld1,         OpCode32SimdMemSingle.Create,   OpCode32SimdMemSingle.CreateT32);
+            SetAsimd("111101001x10xxxxxxxx110000x0xxxx", InstName.Vld1,        InstEmit32.Vld1,         OpCode32SimdMemSingle.Create,   OpCode32SimdMemSingle.CreateT32);
+            SetAsimd("111101001x10xxxxxxxx110001xxxxxx", InstName.Vld1,        InstEmit32.Vld1,         OpCode32SimdMemSingle.Create,   OpCode32SimdMemSingle.CreateT32);
+            SetAsimd("111101001x10xxxxxxxx110010xxxxxx", InstName.Vld1,        InstEmit32.Vld1,         OpCode32SimdMemSingle.Create,   OpCode32SimdMemSingle.CreateT32);
+            SetAsimd("111101000x10xxxxxxxx0111xx0xxxxx", InstName.Vld1,        InstEmit32.Vld1,         OpCode32SimdMemPair.Create,     OpCode32SimdMemPair.CreateT32); // Regs = 1.
+            SetAsimd("111101000x10xxxxxxxx1010xx<<xxxx", InstName.Vld1,        InstEmit32.Vld1,         OpCode32SimdMemPair.Create,     OpCode32SimdMemPair.CreateT32); // Regs = 2.
+            SetAsimd("111101000x10xxxxxxxx0110xx0xxxxx", InstName.Vld1,        InstEmit32.Vld1,         OpCode32SimdMemPair.Create,     OpCode32SimdMemPair.CreateT32); // Regs = 3.
+            SetAsimd("111101000x10xxxxxxxx0010xxxxxxxx", InstName.Vld1,        InstEmit32.Vld1,         OpCode32SimdMemPair.Create,     OpCode32SimdMemPair.CreateT32); // Regs = 4.
+            SetAsimd("111101001x10xxxxxxxx0x01xxxxxxxx", InstName.Vld2,        InstEmit32.Vld2,         OpCode32SimdMemSingle.Create,   OpCode32SimdMemSingle.CreateT32);
+            SetAsimd("111101001x10xxxxxxxx1001xx0xxxxx", InstName.Vld2,        InstEmit32.Vld2,         OpCode32SimdMemSingle.Create,   OpCode32SimdMemSingle.CreateT32);
+            SetAsimd("111101001x10xxxxxxxx1101<<xxxxxx", InstName.Vld2,        InstEmit32.Vld2,         OpCode32SimdMemSingle.Create,   OpCode32SimdMemSingle.CreateT32);
+            SetAsimd("111101000x10xxxxxxxx100x<<0xxxxx", InstName.Vld2,        InstEmit32.Vld2,         OpCode32SimdMemPair.Create,     OpCode32SimdMemPair.CreateT32); // Regs = 1, inc = 1/2 (itype).
+            SetAsimd("111101000x10xxxxxxxx100x<<10xxxx", InstName.Vld2,        InstEmit32.Vld2,         OpCode32SimdMemPair.Create,     OpCode32SimdMemPair.CreateT32); // Regs = 1, inc = 1/2 (itype).
+            SetAsimd("111101000x10xxxxxxxx0011<<xxxxxx", InstName.Vld2,        InstEmit32.Vld2,         OpCode32SimdMemPair.Create,     OpCode32SimdMemPair.CreateT32); // Regs = 2, inc = 2.
+            SetAsimd("111101001x10xxxxxxxx0x10xxx0xxxx", InstName.Vld3,        InstEmit32.Vld3,         OpCode32SimdMemSingle.Create,   OpCode32SimdMemSingle.CreateT32);
+            SetAsimd("111101001x10xxxxxxxx1010xx00xxxx", InstName.Vld3,        InstEmit32.Vld3,         OpCode32SimdMemSingle.Create,   OpCode32SimdMemSingle.CreateT32);
+            SetAsimd("111101001x10xxxxxxxx1110<<x0xxxx", InstName.Vld3,        InstEmit32.Vld3,         OpCode32SimdMemSingle.Create,   OpCode32SimdMemSingle.CreateT32);
+            SetAsimd("111101000x10xxxxxxxx010x<<0xxxxx", InstName.Vld3,        InstEmit32.Vld3,         OpCode32SimdMemPair.Create,     OpCode32SimdMemPair.CreateT32); // Inc = 1/2 (itype).
+            SetAsimd("111101001x10xxxxxxxx0x11xxxxxxxx", InstName.Vld4,        InstEmit32.Vld4,         OpCode32SimdMemSingle.Create,   OpCode32SimdMemSingle.CreateT32);
+            SetAsimd("111101001x10xxxxxxxx1011xx<<xxxx", InstName.Vld4,        InstEmit32.Vld4,         OpCode32SimdMemSingle.Create,   OpCode32SimdMemSingle.CreateT32);
+            SetAsimd("111101001x10xxxxxxxx1111<<x>xxxx", InstName.Vld4,        InstEmit32.Vld4,         OpCode32SimdMemSingle.Create,   OpCode32SimdMemSingle.CreateT32);
+            SetAsimd("111101000x10xxxxxxxx000x<<xxxxxx", InstName.Vld4,        InstEmit32.Vld4,         OpCode32SimdMemPair.Create,     OpCode32SimdMemPair.CreateT32); // Inc = 1/2 (itype).
+            SetAsimd("1111001x0x<<xxxxxxxx0110xxx0xxxx", InstName.Vmax,        InstEmit32.Vmax_I,       OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
+            SetAsimd("111100100x00xxxxxxxx1111xxx0xxxx", InstName.Vmax,        InstEmit32.Vmax_V,       OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
+            SetAsimd("1111001x0x<<xxxxxxxx0110xxx1xxxx", InstName.Vmin,        InstEmit32.Vmin_I,       OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
+            SetAsimd("111100100x10xxxxxxxx1111xxx0xxxx", InstName.Vmin,        InstEmit32.Vmin_V,       OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
+            SetAsimd("111100110x0xxxxxxxxx1111xxx1xxxx", InstName.Vmaxnm,      InstEmit32.Vmaxnm_V,     OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
+            SetAsimd("111100110x1xxxxxxxxx1111xxx1xxxx", InstName.Vminnm,      InstEmit32.Vminnm_V,     OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
+            SetAsimd("1111001x1x<<xxxxxxxx000xx1x0xxxx", InstName.Vmla,        InstEmit32.Vmla_1,       OpCode32SimdRegElem.Create,     OpCode32SimdRegElem.CreateT32);
+            SetAsimd("111100100xxxxxxxxxxx1001xxx0xxxx", InstName.Vmla,        InstEmit32.Vmla_I,       OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
+            SetAsimd("111100100x00xxxxxxxx1101xxx1xxxx", InstName.Vmla,        InstEmit32.Vmla_V,       OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
+            SetAsimd("1111001x1x<<xxxxxxx01000x0x0xxxx", InstName.Vmlal,       InstEmit32.Vmlal_I,      OpCode32SimdRegLong.Create,     OpCode32SimdRegLong.CreateT32);
+            SetAsimd("1111001x1x<<xxxxxxxx010xx1x0xxxx", InstName.Vmls,        InstEmit32.Vmls_1,       OpCode32SimdRegElem.Create,     OpCode32SimdRegElem.CreateT32);
+            SetAsimd("111100100x10xxxxxxxx1101xxx1xxxx", InstName.Vmls,        InstEmit32.Vmls_V,       OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
+            SetAsimd("111100110xxxxxxxxxxx1001xxx0xxxx", InstName.Vmls,        InstEmit32.Vmls_I,       OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
+            SetAsimd("1111001x1x<<xxxxxxx01010x0x0xxxx", InstName.Vmlsl,       InstEmit32.Vmlsl_I,      OpCode32SimdRegLong.Create,     OpCode32SimdRegLong.CreateT32);
+            SetAsimd("1111001x1x000xxxxxxx0xx00x01xxxx", InstName.Vmov,        InstEmit32.Vmov_I,       OpCode32SimdImm.Create,         OpCode32SimdImm.CreateT32); // D/Q vector I32.
+            SetAsimd("1111001x1x000xxxxxxx10x00x01xxxx", InstName.Vmov,        InstEmit32.Vmov_I,       OpCode32SimdImm.Create,         OpCode32SimdImm.CreateT32); // D/Q I16.
+            SetAsimd("1111001x1x000xxxxxxx11xx0x01xxxx", InstName.Vmov,        InstEmit32.Vmov_I,       OpCode32SimdImm.Create,         OpCode32SimdImm.CreateT32); // D/Q (dt - from cmode).
+            SetAsimd("1111001x1x000xxxxxxx11100x11xxxx", InstName.Vmov,        InstEmit32.Vmov_I,       OpCode32SimdImm.Create,         OpCode32SimdImm.CreateT32); // D/Q I64.
+            SetAsimd("1111001x1x001000xxx0101000x1xxxx", InstName.Vmovl,       InstEmit32.Vmovl,        OpCode32SimdLong.Create,        OpCode32SimdLong.CreateT32);
+            SetAsimd("1111001x1x010000xxx0101000x1xxxx", InstName.Vmovl,       InstEmit32.Vmovl,        OpCode32SimdLong.Create,        OpCode32SimdLong.CreateT32);
+            SetAsimd("1111001x1x100000xxx0101000x1xxxx", InstName.Vmovl,       InstEmit32.Vmovl,        OpCode32SimdLong.Create,        OpCode32SimdLong.CreateT32);
+            SetAsimd("111100111x11<<10xxxx001000x0xxx0", InstName.Vmovn,       InstEmit32.Vmovn,        OpCode32SimdMovn.Create,        OpCode32SimdMovn.CreateT32);
+            SetAsimd("1111001x1x<<xxxxxxxx100xx1x0xxxx", InstName.Vmul,        InstEmit32.Vmul_1,       OpCode32SimdRegElem.Create,     OpCode32SimdRegElem.CreateT32);
+            SetAsimd("111100100x<<xxxxxxxx1001xxx1xxxx", InstName.Vmul,        InstEmit32.Vmul_I,       OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
+            SetAsimd("111100110x00xxxxxxxx1001xxx1xxxx", InstName.Vmul,        InstEmit32.Vmul_I,       OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
+            SetAsimd("111100110x00xxxxxxxx1101xxx1xxxx", InstName.Vmul,        InstEmit32.Vmul_V,       OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
+            SetAsimd("1111001x1x<<xxxxxxx01010x1x0xxxx", InstName.Vmull,       InstEmit32.Vmull_1,      OpCode32SimdRegElemLong.Create, OpCode32SimdRegElemLong.CreateT32);
+            SetAsimd("1111001x1x<<xxxxxxx01100x0x0xxxx", InstName.Vmull,       InstEmit32.Vmull_I,      OpCode32SimdRegLong.Create,     OpCode32SimdRegLong.CreateT32);
+            SetAsimd("111100101xx0xxxxxxx01110x0x0xxxx", InstName.Vmull,       InstEmit32.Vmull_I,      OpCode32SimdRegLong.Create,     OpCode32SimdRegLong.CreateT32); // P8/P64
+            SetAsimd("111100111x110000xxxx01011xx0xxxx", InstName.Vmvn,        InstEmit32.Vmvn_I,       OpCode32SimdBinary.Create,      OpCode32SimdBinary.CreateT32);
+            SetAsimd("1111001x1x000xxxxxxx0xx00x11xxxx", InstName.Vmvn,        InstEmit32.Vmvn_II,      OpCode32SimdImm.Create,         OpCode32SimdImm.CreateT32); // D/Q vector I32.
+            SetAsimd("1111001x1x000xxxxxxx10x00x11xxxx", InstName.Vmvn,        InstEmit32.Vmvn_II,      OpCode32SimdImm.Create,         OpCode32SimdImm.CreateT32);
+            SetAsimd("1111001x1x000xxxxxxx110x0x11xxxx", InstName.Vmvn,        InstEmit32.Vmvn_II,      OpCode32SimdImm.Create,         OpCode32SimdImm.CreateT32);
+            SetAsimd("111100111x11<<01xxxx00111xx0xxxx", InstName.Vneg,        InstEmit32.Vneg_V,       OpCode32SimdCmpZ.Create,        OpCode32SimdCmpZ.CreateT32);
+            SetAsimd("111100111x111001xxxx01111xx0xxxx", InstName.Vneg,        InstEmit32.Vneg_V,       OpCode32SimdCmpZ.Create,        OpCode32SimdCmpZ.CreateT32);
+            SetAsimd("111100100x11xxxxxxxx0001xxx1xxxx", InstName.Vorn,        InstEmit32.Vorn_I,       OpCode32SimdBinary.Create,      OpCode32SimdBinary.CreateT32);
+            SetAsimd("111100100x10xxxxxxxx0001xxx1xxxx", InstName.Vorr,        InstEmit32.Vorr_I,       OpCode32SimdBinary.Create,      OpCode32SimdBinary.CreateT32);
+            SetAsimd("1111001x1x000xxxxxxx<<x10x01xxxx", InstName.Vorr,        InstEmit32.Vorr_II,      OpCode32SimdImm.Create,         OpCode32SimdImm.CreateT32);
+            SetAsimd("111100100x<<xxxxxxxx1011x0x1xxxx", InstName.Vpadd,       InstEmit32.Vpadd_I,      OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
+            SetAsimd("111100110x00xxxxxxxx1101x0x0xxxx", InstName.Vpadd,       InstEmit32.Vpadd_V,      OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
+            SetAsimd("111100111x11<<00xxxx0010xxx0xxxx", InstName.Vpaddl,      InstEmit32.Vpaddl,       OpCode32SimdCmpZ.Create,        OpCode32SimdCmpZ.CreateT32);
+            SetAsimd("1111001x0x<<xxxxxxxx1010x0x0xxxx", InstName.Vpmax,       InstEmit32.Vpmax_I,      OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
+            SetAsimd("111100110x00xxxxxxxx1111x0x0xxxx", InstName.Vpmax,       InstEmit32.Vpmax_V,      OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
+            SetAsimd("1111001x0x<<xxxxxxxx1010x0x1xxxx", InstName.Vpmin,       InstEmit32.Vpmin_I,      OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
+            SetAsimd("111100110x10xxxxxxxx1111x0x0xxxx", InstName.Vpmin,       InstEmit32.Vpmin_V,      OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
+            SetAsimd("1111001x0xxxxxxxxxxx0000xxx1xxxx", InstName.Vqadd,       InstEmit32.Vqadd,        OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
+            SetAsimd("111100100x01xxxxxxxx1011xxx0xxxx", InstName.Vqdmulh,     InstEmit32.Vqdmulh,      OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
+            SetAsimd("111100100x10xxxxxxxx1011xxx0xxxx", InstName.Vqdmulh,     InstEmit32.Vqdmulh,      OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
+            SetAsimd("111100111x11<<10xxxx00101xx0xxx0", InstName.Vqmovn,      InstEmit32.Vqmovn,       OpCode32SimdMovn.Create,        OpCode32SimdMovn.CreateT32);
+            SetAsimd("111100111x11<<10xxxx001001x0xxx0", InstName.Vqmovun,     InstEmit32.Vqmovun,      OpCode32SimdMovn.Create,        OpCode32SimdMovn.CreateT32);
+            SetAsimd("1111001x1x>>>xxxxxxx100101x1xxx0", InstName.Vqrshrn,     InstEmit32.Vqrshrn,      OpCode32SimdShImmNarrow.Create, OpCode32SimdShImmNarrow.CreateT32);
+            SetAsimd("111100111x>>>xxxxxxx100001x1xxx0", InstName.Vqrshrun,    InstEmit32.Vqrshrun,     OpCode32SimdShImmNarrow.Create, OpCode32SimdShImmNarrow.CreateT32);
+            SetAsimd("1111001x1x>>>xxxxxxx100100x1xxx0", InstName.Vqshrn,      InstEmit32.Vqshrn,       OpCode32SimdShImmNarrow.Create, OpCode32SimdShImmNarrow.CreateT32);
+            SetAsimd("111100111x>>>xxxxxxx100000x1xxx0", InstName.Vqshrun,     InstEmit32.Vqshrun,      OpCode32SimdShImmNarrow.Create, OpCode32SimdShImmNarrow.CreateT32);
+            SetAsimd("1111001x0xxxxxxxxxxx0010xxx1xxxx", InstName.Vqsub,       InstEmit32.Vqsub,        OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
+            SetAsimd("111100111x111011xxxx010x0xx0xxxx", InstName.Vrecpe,      InstEmit32.Vrecpe,       OpCode32SimdSqrte.Create,       OpCode32SimdSqrte.CreateT32);
+            SetAsimd("111100100x00xxxxxxxx1111xxx1xxxx", InstName.Vrecps,      InstEmit32.Vrecps,       OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
+            SetAsimd("111100111x11xx00xxxx000<<xx0xxxx", InstName.Vrev,        InstEmit32.Vrev,         OpCode32SimdRev.Create,         OpCode32SimdRev.CreateT32);
+            SetAsimd("1111001x0x<<xxxxxxxx0001xxx0xxxx", InstName.Vrhadd,      InstEmit32.Vrhadd,       OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
+            SetAsimd("111100111x111010xxxx01010xx0xxxx", InstName.Vrinta,      InstEmit32.Vrinta_V,     OpCode32SimdCmpZ.Create,        OpCode32SimdCmpZ.CreateT32);
+            SetAsimd("111100111x111010xxxx01101xx0xxxx", InstName.Vrintm,      InstEmit32.Vrintm_V,     OpCode32SimdCmpZ.Create,        OpCode32SimdCmpZ.CreateT32);
+            SetAsimd("111100111x111010xxxx01000xx0xxxx", InstName.Vrintn,      InstEmit32.Vrintn_V,     OpCode32SimdCmpZ.Create,        OpCode32SimdCmpZ.CreateT32);
+            SetAsimd("111100111x111010xxxx01111xx0xxxx", InstName.Vrintp,      InstEmit32.Vrintp_V,     OpCode32SimdCmpZ.Create,        OpCode32SimdCmpZ.CreateT32);
+            SetAsimd("1111001x1x>>>xxxxxxx0010>xx1xxxx", InstName.Vrshr,       InstEmit32.Vrshr,        OpCode32SimdShImm.Create,       OpCode32SimdShImm.CreateT32);
+            SetAsimd("111100101x>>>xxxxxxx100001x1xxx0", InstName.Vrshrn,      InstEmit32.Vrshrn,       OpCode32SimdShImmNarrow.Create, OpCode32SimdShImmNarrow.CreateT32);
+            SetAsimd("111100111x111011xxxx010x1xx0xxxx", InstName.Vrsqrte,     InstEmit32.Vrsqrte,      OpCode32SimdSqrte.Create,       OpCode32SimdSqrte.CreateT32);
+            SetAsimd("111100100x10xxxxxxxx1111xxx1xxxx", InstName.Vrsqrts,     InstEmit32.Vrsqrts,      OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
+            SetAsimd("1111001x1x>>>xxxxxxx0011>xx1xxxx", InstName.Vrsra,       InstEmit32.Vrsra,        OpCode32SimdShImm.Create,       OpCode32SimdShImm.CreateT32);
+            SetAsimd("111100101x>>>xxxxxxx0101>xx1xxxx", InstName.Vshl,        InstEmit32.Vshl,         OpCode32SimdShImm.Create,       OpCode32SimdShImm.CreateT32);
+            SetAsimd("1111001x0xxxxxxxxxxx0100xxx0xxxx", InstName.Vshl,        InstEmit32.Vshl_I,       OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
+            SetAsimd("1111001x1x>>>xxxxxxx101000x1xxxx", InstName.Vshll,       InstEmit32.Vshll,        OpCode32SimdShImmLong.Create,   OpCode32SimdShImmLong.CreateT32); // A1 encoding.
+            SetAsimd("1111001x1x>>>xxxxxxx0000>xx1xxxx", InstName.Vshr,        InstEmit32.Vshr,         OpCode32SimdShImm.Create,       OpCode32SimdShImm.CreateT32);
+            SetAsimd("111100101x>>>xxxxxxx100000x1xxx0", InstName.Vshrn,       InstEmit32.Vshrn,        OpCode32SimdShImmNarrow.Create, OpCode32SimdShImmNarrow.CreateT32);
+            SetAsimd("1111001x1x>>>xxxxxxx0001>xx1xxxx", InstName.Vsra,        InstEmit32.Vsra,         OpCode32SimdShImm.Create,       OpCode32SimdShImm.CreateT32);
+            SetAsimd("111101001x00xxxxxxxx0000xxx0xxxx", InstName.Vst1,        InstEmit32.Vst1,         OpCode32SimdMemSingle.Create,   OpCode32SimdMemSingle.CreateT32);
+            SetAsimd("111101001x00xxxxxxxx0100xx0xxxxx", InstName.Vst1,        InstEmit32.Vst1,         OpCode32SimdMemSingle.Create,   OpCode32SimdMemSingle.CreateT32);
+            SetAsimd("111101001x00xxxxxxxx1000x000xxxx", InstName.Vst1,        InstEmit32.Vst1,         OpCode32SimdMemSingle.Create,   OpCode32SimdMemSingle.CreateT32);
+            SetAsimd("111101001x00xxxxxxxx1000x011xxxx", InstName.Vst1,        InstEmit32.Vst1,         OpCode32SimdMemSingle.Create,   OpCode32SimdMemSingle.CreateT32);
+            SetAsimd("111101000x00xxxxxxxx0111xx0xxxxx", InstName.Vst1,        InstEmit32.Vst1,         OpCode32SimdMemPair.Create,     OpCode32SimdMemPair.CreateT32); // Regs = 1.
+            SetAsimd("111101000x00xxxxxxxx1010xx<<xxxx", InstName.Vst1,        InstEmit32.Vst1,         OpCode32SimdMemPair.Create,     OpCode32SimdMemPair.CreateT32); // Regs = 2.
+            SetAsimd("111101000x00xxxxxxxx0110xx0xxxxx", InstName.Vst1,        InstEmit32.Vst1,         OpCode32SimdMemPair.Create,     OpCode32SimdMemPair.CreateT32); // Regs = 3.
+            SetAsimd("111101000x00xxxxxxxx0010xxxxxxxx", InstName.Vst1,        InstEmit32.Vst1,         OpCode32SimdMemPair.Create,     OpCode32SimdMemPair.CreateT32); // Regs = 4.
+            SetAsimd("111101001x00xxxxxxxx0x01xxxxxxxx", InstName.Vst2,        InstEmit32.Vst2,         OpCode32SimdMemSingle.Create,   OpCode32SimdMemSingle.CreateT32);
+            SetAsimd("111101001x00xxxxxxxx1001xx0xxxxx", InstName.Vst2,        InstEmit32.Vst2,         OpCode32SimdMemSingle.Create,   OpCode32SimdMemSingle.CreateT32);
+            SetAsimd("111101000x00xxxxxxxx100x<<0xxxxx", InstName.Vst2,        InstEmit32.Vst2,         OpCode32SimdMemPair.Create,     OpCode32SimdMemPair.CreateT32); // Regs = 1, inc = 1/2 (itype).
+            SetAsimd("111101000x00xxxxxxxx100x<<10xxxx", InstName.Vst2,        InstEmit32.Vst2,         OpCode32SimdMemPair.Create,     OpCode32SimdMemPair.CreateT32); // Regs = 1, inc = 1/2 (itype).
+            SetAsimd("111101000x00xxxxxxxx0011<<xxxxxx", InstName.Vst2,        InstEmit32.Vst2,         OpCode32SimdMemPair.Create,     OpCode32SimdMemPair.CreateT32); // Regs = 2, inc = 2.
+            SetAsimd("111101001x00xxxxxxxx0x10xxx0xxxx", InstName.Vst3,        InstEmit32.Vst3,         OpCode32SimdMemSingle.Create,   OpCode32SimdMemSingle.CreateT32);
+            SetAsimd("111101001x00xxxxxxxx1010xx00xxxx", InstName.Vst3,        InstEmit32.Vst3,         OpCode32SimdMemSingle.Create,   OpCode32SimdMemSingle.CreateT32);
+            SetAsimd("111101000x00xxxxxxxx010x<<0xxxxx", InstName.Vst3,        InstEmit32.Vst3,         OpCode32SimdMemPair.Create,     OpCode32SimdMemPair.CreateT32); // Inc = 1/2 (itype).
+            SetAsimd("111101001x00xxxxxxxx0x11xxxxxxxx", InstName.Vst4,        InstEmit32.Vst4,         OpCode32SimdMemSingle.Create,   OpCode32SimdMemSingle.CreateT32);
+            SetAsimd("111101001x00xxxxxxxx1011xx<<xxxx", InstName.Vst4,        InstEmit32.Vst4,         OpCode32SimdMemSingle.Create,   OpCode32SimdMemSingle.CreateT32);
+            SetAsimd("111101000x00xxxxxxxx000x<<xxxxxx", InstName.Vst4,        InstEmit32.Vst4,         OpCode32SimdMemPair.Create,     OpCode32SimdMemPair.CreateT32); // Inc = 1/2 (itype).
+            SetAsimd("111100110xxxxxxxxxxx1000xxx0xxxx", InstName.Vsub,        InstEmit32.Vsub_I,       OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
+            SetAsimd("111100100x10xxxxxxxx1101xxx0xxxx", InstName.Vsub,        InstEmit32.Vsub_V,       OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
+            SetAsimd("1111001x1x<<xxxxxxx00010x0x0xxxx", InstName.Vsubl,       InstEmit32.Vsubl_I,      OpCode32SimdRegLong.Create,     OpCode32SimdRegLong.CreateT32);
+            SetAsimd("1111001x1x<<xxxxxxx00011x0x0xxxx", InstName.Vsubw,       InstEmit32.Vsubw_I,      OpCode32SimdRegWide.Create,     OpCode32SimdRegWide.CreateT32);
+            SetAsimd("111100111x11xxxxxxxx10xxxxx0xxxx", InstName.Vtbl,        InstEmit32.Vtbl,         OpCode32SimdTbl.Create,         OpCode32SimdTbl.CreateT32);
+            SetAsimd("111100111x11<<10xxxx00001xx0xxxx", InstName.Vtrn,        InstEmit32.Vtrn,         OpCode32SimdCmpZ.Create,        OpCode32SimdCmpZ.CreateT32);
+            SetAsimd("111100100x<<xxxxxxxx1000xxx1xxxx", InstName.Vtst,        InstEmit32.Vtst,         OpCode32SimdReg.Create,         OpCode32SimdReg.CreateT32);
+            SetAsimd("111100111x11<<10xxxx00010xx0xxxx", InstName.Vuzp,        InstEmit32.Vuzp,         OpCode32SimdCmpZ.Create,        OpCode32SimdCmpZ.CreateT32);
+            SetAsimd("111100111x11<<10xxxx00011xx0xxxx", InstName.Vzip,        InstEmit32.Vzip,         OpCode32SimdCmpZ.Create,        OpCode32SimdCmpZ.CreateT32);
             #endregion
 
             #region "OpCode Table (AArch32, T16)"
@@ -1130,7 +1133,7 @@ namespace ARMeilleure.Decoders
             SetT16("1101<<<xxxxxxxxx", InstName.B,      InstEmit32.B,       OpCodeT16BImm8.Create);
             SetT16("11011111xxxxxxxx", InstName.Svc,    InstEmit32.Svc,     OpCodeT16Exception.Create);
             SetT16("11100xxxxxxxxxxx", InstName.B,      InstEmit32.B,       OpCodeT16BImm11.Create);
-#endregion
+            #endregion
 
             #region "OpCode Table (AArch32, T32)"
             // Base
@@ -1298,7 +1301,7 @@ namespace ARMeilleure.Decoders
             SetT32("11110011101011111000000000000010", InstName.Wfe,      InstEmit32.Nop,      OpCodeT32.Create);
             SetT32("11110011101011111000000000000011", InstName.Wfi,      InstEmit32.Nop,      OpCodeT32.Create);
             SetT32("11110011101011111000000000000001", InstName.Yield,    InstEmit32.Nop,      OpCodeT32.Create);
-#endregion
+            #endregion
 
             FillFastLookupTable(_instA32FastLookup, _allInstA32, ToFastLookupIndexA);
             FillFastLookupTable(_instT32FastLookup, _allInstT32, ToFastLookupIndexT);

src/ARMeilleure/Decoders/Optimizations/TailCallRemover.cs

@@ -17,7 +17,7 @@ namespace ARMeilleure.Decoders.Optimizations
                 throw new InvalidOperationException("Function entry point is not contained in a block.");
             }
 
-            const ulong allowance = 4;
+            const ulong Allowance = 4;
 
             Block entryBlock = blocks[entryBlockId];
 
@@ -31,7 +31,7 @@ namespace ARMeilleure.Decoders.Optimizations
             {
                 Block block = blocks[i];
 
-                if (endBlock.EndAddress < block.Address - allowance)
+                if (endBlock.EndAddress < block.Address - Allowance)
                 {
                     break; // End of contiguous function.
                 }
@@ -44,7 +44,7 @@ namespace ARMeilleure.Decoders.Optimizations
             {
                 Block block = blocks[i];
 
-                if (startBlock.Address > block.EndAddress + allowance)
+                if (startBlock.Address > block.EndAddress + Allowance)
                 {
                     break; // End of contiguous function.
                 }

src/ARMeilleure/Instructions/InstEmitSimdArithmetic.cs

@@ -883,6 +883,31 @@ namespace ARMeilleure.Instructions
             }
         }
 
+        public static void Fmaxp_S(ArmEmitterContext context)
+        {
+            if (Optimizations.UseAdvSimd)
+            {
+                InstEmitSimdHelperArm64.EmitScalarUnaryOpF(context, Intrinsic.Arm64FmaxpS);
+            }
+            else if (Optimizations.FastFP && Optimizations.UseSse41)
+            {
+                EmitSse2ScalarPairwiseOpF(context, (op1, op2) =>
+                {
+                    return EmitSse41ProcessNaNsOpF(context, (op1, op2) =>
+                    {
+                        return EmitSse2VectorMaxMinOpF(context, op1, op2, isMax: true);
+                    }, scalar: true, op1, op2);
+                });
+            }
+            else
+            {
+                EmitScalarPairwiseOpF(context, (op1, op2) =>
+                {
+                    return EmitSoftFloatCall(context, nameof(SoftFloat32.FPMax), op1, op2);
+                });
+            }
+        }
+
         public static void Fmaxp_V(ArmEmitterContext context)
         {
             if (Optimizations.UseAdvSimd)
@@ -1081,6 +1106,31 @@ namespace ARMeilleure.Instructions
             }
         }
 
+        public static void Fminp_S(ArmEmitterContext context)
+        {
+            if (Optimizations.UseAdvSimd)
+            {
+                InstEmitSimdHelperArm64.EmitScalarUnaryOpF(context, Intrinsic.Arm64FminpS);
+            }
+            else if (Optimizations.FastFP && Optimizations.UseSse41)
+            {
+                EmitSse2ScalarPairwiseOpF(context, (op1, op2) =>
+                {
+                    return EmitSse41ProcessNaNsOpF(context, (op1, op2) =>
+                    {
+                        return EmitSse2VectorMaxMinOpF(context, op1, op2, isMax: false);
+                    }, scalar: true, op1, op2);
+                });
+            }
+            else
+            {
+                EmitScalarPairwiseOpF(context, (op1, op2) =>
+                {
+                    return EmitSoftFloatCall(context, nameof(SoftFloat32.FPMin), op1, op2);
+                });
+            }
+        }
+
         public static void Fminp_V(ArmEmitterContext context)
         {
             if (Optimizations.UseAdvSimd)

src/ARMeilleure/Instructions/InstEmitSimdCvt32.cs

@@ -114,6 +114,35 @@ namespace ARMeilleure.Instructions
             }
         }
 
+        public static void Vcvt_V_Fixed(ArmEmitterContext context)
+        {
+            OpCode32SimdCvtFFixed op = (OpCode32SimdCvtFFixed)context.CurrOp;
+
+            var toFixed = op.Opc == 1;
+            int fracBits = op.Fbits;
+            var unsigned = op.U;
+
+            if (toFixed) // F32 to S32 or U32 (fixed)
+            {
+                EmitVectorUnaryOpF32(context, (op1) =>
+                {
+                    var scaledValue = context.Multiply(op1, ConstF(MathF.Pow(2f, fracBits)));
+                    MethodInfo info = unsigned ? typeof(SoftFallback).GetMethod(nameof(SoftFallback.SatF32ToU32)) : typeof(SoftFallback).GetMethod(nameof(SoftFallback.SatF32ToS32));
+
+                    return context.Call(info, scaledValue);
+                });
+            }
+            else // S32 or U32 (fixed) to F32
+            {
+                EmitVectorUnaryOpI32(context, (op1) =>
+                {
+                    var floatValue = unsigned ? context.ConvertToFPUI(OperandType.FP32, op1) : context.ConvertToFP(OperandType.FP32, op1);
+
+                    return context.Multiply(floatValue, ConstF(1f / MathF.Pow(2f, fracBits)));
+                }, !unsigned);
+            }
+        }
+
         public static void Vcvt_FD(ArmEmitterContext context)
         {
             OpCode32SimdS op = (OpCode32SimdS)context.CurrOp;

src/ARMeilleure/Instructions/InstEmitSimdHelper.cs

@@ -32,7 +32,7 @@ namespace ARMeilleure.Instructions
             15L << 56 | 14L << 48 | 13L << 40 | 12L << 32 | 07L << 24 | 06L << 16 | 05L << 8 | 04L << 0, // S
         };
 
-        public static readonly long ZeroMask = 128L << 56 | 128L << 48 | 128L << 40 | 128L << 32 | 128L << 24 | 128L << 16 | 128L << 8 | 128L << 0;
+        public const long ZeroMask = 128L << 56 | 128L << 48 | 128L << 40 | 128L << 32 | 128L << 24 | 128L << 16 | 128L << 8 | 128L << 0;
 
         public static ulong X86GetGf2p8LogicalShiftLeft(int shift)
         {
@@ -1299,17 +1299,17 @@ namespace ARMeilleure.Instructions
 
             Debug.Assert((op.Size & 1) == 0 && op.RegisterSize == RegisterSize.Simd128);
 
-            const int sm0 = 0 << 6 | 0 << 4 | 0 << 2 | 0 << 0;
-            const int sm1 = 1 << 6 | 1 << 4 | 1 << 2 | 1 << 0;
-            const int sm2 = 2 << 6 | 2 << 4 | 2 << 2 | 2 << 0;
-            const int sm3 = 3 << 6 | 3 << 4 | 3 << 2 | 3 << 0;
+            const int SM0 = 0 << 6 | 0 << 4 | 0 << 2 | 0 << 0;
+            const int SM1 = 1 << 6 | 1 << 4 | 1 << 2 | 1 << 0;
+            const int SM2 = 2 << 6 | 2 << 4 | 2 << 2 | 2 << 0;
+            const int SM3 = 3 << 6 | 3 << 4 | 3 << 2 | 3 << 0;
 
             Operand nCopy = context.Copy(GetVec(op.Rn));
 
-            Operand part0 = context.AddIntrinsic(Intrinsic.X86Shufps, nCopy, nCopy, Const(sm0));
-            Operand part1 = context.AddIntrinsic(Intrinsic.X86Shufps, nCopy, nCopy, Const(sm1));
-            Operand part2 = context.AddIntrinsic(Intrinsic.X86Shufps, nCopy, nCopy, Const(sm2));
-            Operand part3 = context.AddIntrinsic(Intrinsic.X86Shufps, nCopy, nCopy, Const(sm3));
+            Operand part0 = context.AddIntrinsic(Intrinsic.X86Shufps, nCopy, nCopy, Const(SM0));
+            Operand part1 = context.AddIntrinsic(Intrinsic.X86Shufps, nCopy, nCopy, Const(SM1));
+            Operand part2 = context.AddIntrinsic(Intrinsic.X86Shufps, nCopy, nCopy, Const(SM2));
+            Operand part3 = context.AddIntrinsic(Intrinsic.X86Shufps, nCopy, nCopy, Const(SM3));
 
             Operand res = emit(emit(part0, part1), emit(part2, part3));
 
@@ -1340,13 +1340,13 @@ namespace ARMeilleure.Instructions
 
             if ((op.Size & 1) == 0)
             {
-                const int sm0 = 2 << 6 | 2 << 4 | 2 << 2 | 0 << 0;
-                const int sm1 = 2 << 6 | 2 << 4 | 2 << 2 | 1 << 0;
+                const int SM0 = 2 << 6 | 2 << 4 | 2 << 2 | 0 << 0;
+                const int SM1 = 2 << 6 | 2 << 4 | 2 << 2 | 1 << 0;
 
                 Operand zeroN = context.VectorZeroUpper64(n);
 
-                op0 = context.AddIntrinsic(Intrinsic.X86Pshufd, zeroN, Const(sm0));
-                op1 = context.AddIntrinsic(Intrinsic.X86Pshufd, zeroN, Const(sm1));
+                op0 = context.AddIntrinsic(Intrinsic.X86Pshufd, zeroN, Const(SM0));
+                op1 = context.AddIntrinsic(Intrinsic.X86Pshufd, zeroN, Const(SM1));
             }
             else /* if ((op.Size & 1) == 1) */
             {
@@ -1412,11 +1412,11 @@ namespace ARMeilleure.Instructions
                 }
                 else /* if (op.RegisterSize == RegisterSize.Simd128) */
                 {
-                    const int sm0 = 2 << 6 | 0 << 4 | 2 << 2 | 0 << 0;
-                    const int sm1 = 3 << 6 | 1 << 4 | 3 << 2 | 1 << 0;
+                    const int SM0 = 2 << 6 | 0 << 4 | 2 << 2 | 0 << 0;
+                    const int SM1 = 3 << 6 | 1 << 4 | 3 << 2 | 1 << 0;
 
-                    Operand part0 = context.AddIntrinsic(Intrinsic.X86Shufps, nCopy, mCopy, Const(sm0));
-                    Operand part1 = context.AddIntrinsic(Intrinsic.X86Shufps, nCopy, mCopy, Const(sm1));
+                    Operand part0 = context.AddIntrinsic(Intrinsic.X86Shufps, nCopy, mCopy, Const(SM0));
+                    Operand part1 = context.AddIntrinsic(Intrinsic.X86Shufps, nCopy, mCopy, Const(SM1));
 
                     context.Copy(GetVec(op.Rd), emit(part0, part1));
                 }

src/ARMeilleure/Instructions/InstEmitSimdLogical.cs

@@ -408,7 +408,7 @@ namespace ARMeilleure.Instructions
 
             if (Optimizations.UseGfni)
             {
-                const long bitMatrix =
+                const long BitMatrix =
                     (0b10000000L << 56) |
                     (0b01000000L << 48) |
                     (0b00100000L << 40) |
@@ -418,7 +418,7 @@ namespace ARMeilleure.Instructions
                     (0b00000010L << 8) |
                     (0b00000001L << 0);
 
-                Operand vBitMatrix = X86GetAllElements(context, bitMatrix);
+                Operand vBitMatrix = X86GetAllElements(context, BitMatrix);
 
                 Operand res = context.AddIntrinsic(Intrinsic.X86Gf2p8affineqb, GetVec(op.Rn), vBitMatrix, Const(0));
 
@@ -469,12 +469,12 @@ namespace ARMeilleure.Instructions
 
                 Operand n = GetVec(op.Rn);
 
-                const long maskE0 = 06L << 56 | 07L << 48 | 04L << 40 | 05L << 32 | 02L << 24 | 03L << 16 | 00L << 8 | 01L << 0;
-                const long maskE1 = 14L << 56 | 15L << 48 | 12L << 40 | 13L << 32 | 10L << 24 | 11L << 16 | 08L << 8 | 09L << 0;
+                const long MaskE0 = 06L << 56 | 07L << 48 | 04L << 40 | 05L << 32 | 02L << 24 | 03L << 16 | 00L << 8 | 01L << 0;
+                const long MaskE1 = 14L << 56 | 15L << 48 | 12L << 40 | 13L << 32 | 10L << 24 | 11L << 16 | 08L << 8 | 09L << 0;
 
-                Operand mask = X86GetScalar(context, maskE0);
+                Operand mask = X86GetScalar(context, MaskE0);
 
-                mask = EmitVectorInsert(context, mask, Const(maskE1), 1, 3);
+                mask = EmitVectorInsert(context, mask, Const(MaskE1), 1, 3);
 
                 Operand res = context.AddIntrinsic(Intrinsic.X86Pshufb, n, mask);
 
@@ -503,21 +503,21 @@ namespace ARMeilleure.Instructions
 
                 if (op.Size == 0)
                 {
-                    const long maskE0 = 04L << 56 | 05L << 48 | 06L << 40 | 07L << 32 | 00L << 24 | 01L << 16 | 02L << 8 | 03L << 0;
-                    const long maskE1 = 12L << 56 | 13L << 48 | 14L << 40 | 15L << 32 | 08L << 24 | 09L << 16 | 10L << 8 | 11L << 0;
+                    const long MaskE0 = 04L << 56 | 05L << 48 | 06L << 40 | 07L << 32 | 00L << 24 | 01L << 16 | 02L << 8 | 03L << 0;
+                    const long MaskE1 = 12L << 56 | 13L << 48 | 14L << 40 | 15L << 32 | 08L << 24 | 09L << 16 | 10L << 8 | 11L << 0;
 
-                    mask = X86GetScalar(context, maskE0);
+                    mask = X86GetScalar(context, MaskE0);
 
-                    mask = EmitVectorInsert(context, mask, Const(maskE1), 1, 3);
+                    mask = EmitVectorInsert(context, mask, Const(MaskE1), 1, 3);
                 }
                 else /* if (op.Size == 1) */
                 {
-                    const long maskE0 = 05L << 56 | 04L << 48 | 07L << 40 | 06L << 32 | 01L << 24 | 00L << 16 | 03L << 8 | 02L << 0;
-                    const long maskE1 = 13L << 56 | 12L << 48 | 15L << 40 | 14L << 32 | 09L << 24 | 08L << 16 | 11L << 8 | 10L << 0;
+                    const long MaskE0 = 05L << 56 | 04L << 48 | 07L << 40 | 06L << 32 | 01L << 24 | 00L << 16 | 03L << 8 | 02L << 0;
+                    const long MaskE1 = 13L << 56 | 12L << 48 | 15L << 40 | 14L << 32 | 09L << 24 | 08L << 16 | 11L << 8 | 10L << 0;
 
-                    mask = X86GetScalar(context, maskE0);
+                    mask = X86GetScalar(context, MaskE0);
 
-                    mask = EmitVectorInsert(context, mask, Const(maskE1), 1, 3);
+                    mask = EmitVectorInsert(context, mask, Const(MaskE1), 1, 3);
                 }
 
                 Operand res = context.AddIntrinsic(Intrinsic.X86Pshufb, n, mask);
@@ -547,30 +547,30 @@ namespace ARMeilleure.Instructions
 
                 if (op.Size == 0)
                 {
-                    const long maskE0 = 00L << 56 | 01L << 48 | 02L << 40 | 03L << 32 | 04L << 24 | 05L << 16 | 06L << 8 | 07L << 0;
-                    const long maskE1 = 08L << 56 | 09L << 48 | 10L << 40 | 11L << 32 | 12L << 24 | 13L << 16 | 14L << 8 | 15L << 0;
+                    const long MaskE0 = 00L << 56 | 01L << 48 | 02L << 40 | 03L << 32 | 04L << 24 | 05L << 16 | 06L << 8 | 07L << 0;
+                    const long MaskE1 = 08L << 56 | 09L << 48 | 10L << 40 | 11L << 32 | 12L << 24 | 13L << 16 | 14L << 8 | 15L << 0;
 
-                    mask = X86GetScalar(context, maskE0);
+                    mask = X86GetScalar(context, MaskE0);
 
-                    mask = EmitVectorInsert(context, mask, Const(maskE1), 1, 3);
+                    mask = EmitVectorInsert(context, mask, Const(MaskE1), 1, 3);
                 }
                 else if (op.Size == 1)
                 {
-                    const long maskE0 = 01L << 56 | 00L << 48 | 03L << 40 | 02L << 32 | 05L << 24 | 04L << 16 | 07L << 8 | 06L << 0;
-                    const long maskE1 = 09L << 56 | 08L << 48 | 11L << 40 | 10L << 32 | 13L << 24 | 12L << 16 | 15L << 8 | 14L << 0;
+                    const long MaskE0 = 01L << 56 | 00L << 48 | 03L << 40 | 02L << 32 | 05L << 24 | 04L << 16 | 07L << 8 | 06L << 0;
+                    const long MaskE1 = 09L << 56 | 08L << 48 | 11L << 40 | 10L << 32 | 13L << 24 | 12L << 16 | 15L << 8 | 14L << 0;
 
-                    mask = X86GetScalar(context, maskE0);
+                    mask = X86GetScalar(context, MaskE0);
 
-                    mask = EmitVectorInsert(context, mask, Const(maskE1), 1, 3);
+                    mask = EmitVectorInsert(context, mask, Const(MaskE1), 1, 3);
                 }
                 else /* if (op.Size == 2) */
                 {
-                    const long maskE0 = 03L << 56 | 02L << 48 | 01L << 40 | 00L << 32 | 07L << 24 | 06L << 16 | 05L << 8 | 04L << 0;
-                    const long maskE1 = 11L << 56 | 10L << 48 | 09L << 40 | 08L << 32 | 15L << 24 | 14L << 16 | 13L << 8 | 12L << 0;
+                    const long MaskE0 = 03L << 56 | 02L << 48 | 01L << 40 | 00L << 32 | 07L << 24 | 06L << 16 | 05L << 8 | 04L << 0;
+                    const long MaskE1 = 11L << 56 | 10L << 48 | 09L << 40 | 08L << 32 | 15L << 24 | 14L << 16 | 13L << 8 | 12L << 0;
 
-                    mask = X86GetScalar(context, maskE0);
+                    mask = X86GetScalar(context, MaskE0);
 
-                    mask = EmitVectorInsert(context, mask, Const(maskE1), 1, 3);
+                    mask = EmitVectorInsert(context, mask, Const(MaskE1), 1, 3);
                 }
 
                 Operand res = context.AddIntrinsic(Intrinsic.X86Pshufb, n, mask);

src/ARMeilleure/Instructions/InstName.cs

@@ -228,6 +228,7 @@ namespace ARMeilleure.Instructions
         Fmaxnmp_S,
         Fmaxnmp_V,
         Fmaxnmv_V,
+        Fmaxp_S,
         Fmaxp_V,
         Fmaxv_V,
         Fmin_S,
@@ -237,6 +238,7 @@ namespace ARMeilleure.Instructions
         Fminnmp_S,
         Fminnmp_V,
         Fminnmv_V,
+        Fminp_S,
         Fminp_V,
         Fminv_V,
         Fmla_Se,

src/ARMeilleure/Instructions/SoftFloat.cs

@@ -175,10 +175,10 @@ namespace ARMeilleure.Instructions
 
         public static ushort FPRoundCv(double real, ExecutionContext context)
         {
-            const int minimumExp = -14;
+            const int MinimumExp = -14;
 
-            const int e = 5;
-            const int f = 10;
+            const int E = 5;
+            const int F = 10;
 
             bool sign;
             double mantissa;
@@ -208,15 +208,15 @@ namespace ARMeilleure.Instructions
                 exponent++;
             }
 
-            uint biasedExp = (uint)Math.Max(exponent - minimumExp + 1, 0);
+            uint biasedExp = (uint)Math.Max(exponent - MinimumExp + 1, 0);
 
             if (biasedExp == 0u)
             {
-                mantissa /= Math.Pow(2d, minimumExp - exponent);
+                mantissa /= Math.Pow(2d, MinimumExp - exponent);
             }
 
-            uint intMant = (uint)Math.Floor(mantissa * Math.Pow(2d, f));
-            double error = mantissa * Math.Pow(2d, f) - (double)intMant;
+            uint intMant = (uint)Math.Floor(mantissa * Math.Pow(2d, F));
+            double error = mantissa * Math.Pow(2d, F) - (double)intMant;
 
             if (biasedExp == 0u && (error != 0d || (context.Fpcr & FPCR.Ufe) != 0))
             {
@@ -256,12 +256,12 @@ namespace ARMeilleure.Instructions
             {
                 intMant++;
 
-                if (intMant == 1u << f)
+                if (intMant == 1u << F)
                 {
                     biasedExp = 1u;
                 }
 
-                if (intMant == 1u << (f + 1))
+                if (intMant == 1u << (F + 1))
                 {
                     biasedExp++;
                     intMant >>= 1;
@@ -272,7 +272,7 @@ namespace ARMeilleure.Instructions
 
             if ((context.Fpcr & FPCR.Ahp) == 0)
             {
-                if (biasedExp >= (1u << e) - 1u)
+                if (biasedExp >= (1u << E) - 1u)
                 {
                     resultBits = overflowToInf ? FPInfinity(sign) : FPMaxNormal(sign);
 
@@ -287,7 +287,7 @@ namespace ARMeilleure.Instructions
             }
             else
             {
-                if (biasedExp >= 1u << e)
+                if (biasedExp >= 1u << E)
                 {
                     resultBits = (ushort)((sign ? 1u : 0u) << 15 | 0x7FFFu);
 
@@ -354,10 +354,10 @@ namespace ARMeilleure.Instructions
 
         private static float FPRoundCv(double real, ExecutionContext context)
         {
-            const int minimumExp = -126;
+            const int MinimumExp = -126;
 
-            const int e = 8;
-            const int f = 23;
+            const int E = 8;
+            const int F = 23;
 
             bool sign;
             double mantissa;
@@ -387,22 +387,22 @@ namespace ARMeilleure.Instructions
                 exponent++;
             }
 
-            if ((context.Fpcr & FPCR.Fz) != 0 && exponent < minimumExp)
+            if ((context.Fpcr & FPCR.Fz) != 0 && exponent < MinimumExp)
             {
                 context.Fpsr |= FPSR.Ufc;
 
                 return SoftFloat32.FPZero(sign);
             }
 
-            uint biasedExp = (uint)Math.Max(exponent - minimumExp + 1, 0);
+            uint biasedExp = (uint)Math.Max(exponent - MinimumExp + 1, 0);
 
             if (biasedExp == 0u)
             {
-                mantissa /= Math.Pow(2d, minimumExp - exponent);
+                mantissa /= Math.Pow(2d, MinimumExp - exponent);
             }
 
-            uint intMant = (uint)Math.Floor(mantissa * Math.Pow(2d, f));
-            double error = mantissa * Math.Pow(2d, f) - (double)intMant;
+            uint intMant = (uint)Math.Floor(mantissa * Math.Pow(2d, F));
+            double error = mantissa * Math.Pow(2d, F) - (double)intMant;
 
             if (biasedExp == 0u && (error != 0d || (context.Fpcr & FPCR.Ufe) != 0))
             {
@@ -442,12 +442,12 @@ namespace ARMeilleure.Instructions
             {
                 intMant++;
 
-                if (intMant == 1u << f)
+                if (intMant == 1u << F)
                 {
                     biasedExp = 1u;
                 }
 
-                if (intMant == 1u << (f + 1))
+                if (intMant == 1u << (F + 1))
                 {
                     biasedExp++;
                     intMant >>= 1;
@@ -456,7 +456,7 @@ namespace ARMeilleure.Instructions
 
             float result;
 
-            if (biasedExp >= (1u << e) - 1u)
+            if (biasedExp >= (1u << E) - 1u)
             {
                 result = overflowToInf ? SoftFloat32.FPInfinity(sign) : SoftFloat32.FPMaxNormal(sign);
 
@@ -529,10 +529,10 @@ namespace ARMeilleure.Instructions
 
         private static double FPRoundCv(double real, ExecutionContext context)
         {
-            const int minimumExp = -1022;
+            const int MinimumExp = -1022;
 
-            const int e = 11;
-            const int f = 52;
+            const int E = 11;
+            const int F = 52;
 
             bool sign;
             double mantissa;
@@ -562,22 +562,22 @@ namespace ARMeilleure.Instructions
                 exponent++;
             }
 
-            if ((context.Fpcr & FPCR.Fz) != 0 && exponent < minimumExp)
+            if ((context.Fpcr & FPCR.Fz) != 0 && exponent < MinimumExp)
             {
                 context.Fpsr |= FPSR.Ufc;
 
                 return SoftFloat64.FPZero(sign);
             }
 
-            uint biasedExp = (uint)Math.Max(exponent - minimumExp + 1, 0);
+            uint biasedExp = (uint)Math.Max(exponent - MinimumExp + 1, 0);
 
             if (biasedExp == 0u)
             {
-                mantissa /= Math.Pow(2d, minimumExp - exponent);
+                mantissa /= Math.Pow(2d, MinimumExp - exponent);
             }
 
-            ulong intMant = (ulong)Math.Floor(mantissa * Math.Pow(2d, f));
-            double error = mantissa * Math.Pow(2d, f) - (double)intMant;
+            ulong intMant = (ulong)Math.Floor(mantissa * Math.Pow(2d, F));
+            double error = mantissa * Math.Pow(2d, F) - (double)intMant;
 
             if (biasedExp == 0u && (error != 0d || (context.Fpcr & FPCR.Ufe) != 0))
             {
@@ -617,12 +617,12 @@ namespace ARMeilleure.Instructions
             {
                 intMant++;
 
-                if (intMant == 1ul << f)
+                if (intMant == 1ul << F)
                 {
                     biasedExp = 1u;
                 }
 
-                if (intMant == 1ul << (f + 1))
+                if (intMant == 1ul << (F + 1))
                 {
                     biasedExp++;
                     intMant >>= 1;
@@ -631,7 +631,7 @@ namespace ARMeilleure.Instructions
 
             double result;
 
-            if (biasedExp >= (1u << e) - 1u)
+            if (biasedExp >= (1u << E) - 1u)
             {
                 result = overflowToInf ? SoftFloat64.FPInfinity(sign) : SoftFloat64.FPMaxNormal(sign);
 
@@ -1448,6 +1448,7 @@ namespace ARMeilleure.Instructions
             {
                 var overflowToInf = fpcr.GetRoundingMode() switch
                 {
+                    FPRoundingMode.ToNearest => true,
                     FPRoundingMode.TowardsPlusInfinity => !sign,
                     FPRoundingMode.TowardsMinusInfinity => sign,
                     FPRoundingMode.TowardsZero => false,
@@ -2879,6 +2880,7 @@ namespace ARMeilleure.Instructions
             {
                 var overflowToInf = fpcr.GetRoundingMode() switch
                 {
+                    FPRoundingMode.ToNearest => true,
                     FPRoundingMode.TowardsPlusInfinity => !sign,
                     FPRoundingMode.TowardsMinusInfinity => sign,
                     FPRoundingMode.TowardsZero => false,

src/ARMeilleure/Signal/NativeSignalHandler.cs

@@ -5,7 +5,6 @@ using ARMeilleure.Translation.Cache;
 using System;
 using System.Runtime.CompilerServices;
 using System.Runtime.InteropServices;
-
 using static ARMeilleure.IntermediateRepresentation.Operand.Factory;
 
 namespace ARMeilleure.Signal
@@ -261,20 +260,20 @@ namespace ARMeilleure.Signal
         {
             if (OperatingSystem.IsMacOS())
             {
-                const ulong mcontextOffset = 48; // uc_mcontext
-                Operand ctxPtr = context.Load(OperandType.I64, context.Add(ucontextPtr, Const(mcontextOffset)));
+                const ulong McontextOffset = 48; // uc_mcontext
+                Operand ctxPtr = context.Load(OperandType.I64, context.Add(ucontextPtr, Const(McontextOffset)));
 
                 if (RuntimeInformation.ProcessArchitecture == Architecture.Arm64)
                 {
-                    const ulong esrOffset = 8; // __es.__esr
-                    Operand esr = context.Load(OperandType.I64, context.Add(ctxPtr, Const(esrOffset)));
+                    const ulong EsrOffset = 8; // __es.__esr
+                    Operand esr = context.Load(OperandType.I64, context.Add(ctxPtr, Const(EsrOffset)));
                     return context.BitwiseAnd(esr, Const(0x40ul));
                 }
 
                 if (RuntimeInformation.ProcessArchitecture == Architecture.X64)
                 {
-                    const ulong errOffset = 4; // __es.__err
-                    Operand err = context.Load(OperandType.I64, context.Add(ctxPtr, Const(errOffset)));
+                    const ulong ErrOffset = 4; // __es.__err
+                    Operand err = context.Load(OperandType.I64, context.Add(ctxPtr, Const(ErrOffset)));
                     return context.BitwiseAnd(err, Const(2ul));
                 }
             }
@@ -287,10 +286,10 @@ namespace ARMeilleure.Signal
                     Operand loopLabel = Label();
                     Operand successLabel = Label();
 
-                    const ulong auxOffset = 464; // uc_mcontext.__reserved
-                    const uint esrMagic = 0x45535201;
+                    const ulong AuxOffset = 464; // uc_mcontext.__reserved
+                    const uint EsrMagic = 0x45535201;
 
-                    context.Copy(auxPtr, context.Add(ucontextPtr, Const(auxOffset)));
+                    context.Copy(auxPtr, context.Add(ucontextPtr, Const(AuxOffset)));
 
                     context.MarkLabel(loopLabel);
 
@@ -299,7 +298,7 @@ namespace ARMeilleure.Signal
                     // _aarch64_ctx::size
                     Operand size = context.Load(OperandType.I32, context.Add(auxPtr, Const(4ul)));
 
-                    context.BranchIf(successLabel, magic, Const(esrMagic), Comparison.Equal);
+                    context.BranchIf(successLabel, magic, Const(EsrMagic), Comparison.Equal);
 
                     context.Copy(auxPtr, context.Add(auxPtr, context.ZeroExtend32(OperandType.I64, size)));
 
@@ -314,8 +313,8 @@ namespace ARMeilleure.Signal
 
                 if (RuntimeInformation.ProcessArchitecture == Architecture.X64)
                 {
-                    const int errOffset = 192; // uc_mcontext.gregs[REG_ERR]
-                    Operand err = context.Load(OperandType.I64, context.Add(ucontextPtr, Const(errOffset)));
+                    const int ErrOffset = 192; // uc_mcontext.gregs[REG_ERR]
+                    Operand err = context.Load(OperandType.I64, context.Add(ucontextPtr, Const(ErrOffset)));
                     return context.BitwiseAnd(err, Const(2ul));
                 }
             }

src/ARMeilleure/Translation/PTC/Ptc.cs

@@ -29,7 +29,7 @@ namespace ARMeilleure.Translation.PTC
         private const string OuterHeaderMagicString = "PTCohd\0\0";
         private const string InnerHeaderMagicString = "PTCihd\0\0";
 
-        private const uint InternalVersion = 5292; //! To be incremented manually for each change to the ARMeilleure project.
+        private const uint InternalVersion = 5518; //! To be incremented manually for each change to the ARMeilleure project.
 
         private const string ActualDir = "0";
         private const string BackupDir = "1";
@@ -880,7 +880,7 @@ namespace ARMeilleure.Translation.PTC
 
         private void ReportProgress(object state)
         {
-            const int refreshRate = 50; // ms.
+            const int RefreshRate = 50; // ms.
 
             AutoResetEvent endEvent = (AutoResetEvent)state;
 
@@ -896,7 +896,7 @@ namespace ARMeilleure.Translation.PTC
                     count = newCount;
                 }
             }
-            while (!endEvent.WaitOne(refreshRate));
+            while (!endEvent.WaitOne(RefreshRate));
         }
 
         public static Hash128 ComputeHash(IMemoryManager memory, ulong address, ulong guestSize)

src/ARMeilleure/Translation/PTC/PtcFormatter.cs

@@ -27,6 +27,26 @@ namespace ARMeilleure.Translation.PTC
             return dictionary;
         }
 
+        [MethodImpl(MethodImplOptions.AggressiveInlining)]
+        public static Dictionary<TKey, TValue> DeserializeAndUpdateDictionary<TKey, TValue>(Stream stream, Func<Stream, TValue> valueFunc, Func<TKey, TValue, (TKey, TValue)> updateFunc) where TKey : struct
+        {
+            Dictionary<TKey, TValue> dictionary = new();
+
+            int count = DeserializeStructure<int>(stream);
+
+            for (int i = 0; i < count; i++)
+            {
+                TKey key = DeserializeStructure<TKey>(stream);
+                TValue value = valueFunc(stream);
+
+                (key, value) = updateFunc(key, value);
+
+                dictionary.Add(key, value);
+            }
+
+            return dictionary;
+        }
+
         [MethodImpl(MethodImplOptions.AggressiveInlining)]
         public static List<T> DeserializeList<T>(Stream stream) where T : struct
         {

src/ARMeilleure/Translation/PTC/PtcProfiler.cs

@@ -9,10 +9,13 @@ using System.Collections.Generic;
 using System.Diagnostics;
 using System.IO;
 using System.IO.Compression;
+using System.Linq;
 using System.Runtime.CompilerServices;
 using System.Runtime.InteropServices;
 using System.Threading;
+using System.Timers;
 using static ARMeilleure.Translation.PTC.PtcFormatter;
+using Timer = System.Timers.Timer;
 
 namespace ARMeilleure.Translation.PTC
 {
@@ -20,7 +23,11 @@ namespace ARMeilleure.Translation.PTC
     {
         private const string OuterHeaderMagicString = "Pohd\0\0\0\0";
 
-        private const uint InternalVersion = 1866; //! Not to be incremented manually for each change to the ARMeilleure project.
+        private const uint InternalVersion = 5518; //! Not to be incremented manually for each change to the ARMeilleure project.
+
+        private static readonly uint[] _migrateInternalVersions = {
+            1866,
+        };
 
         private const int SaveInterval = 30; // Seconds.
 
@@ -28,7 +35,7 @@ namespace ARMeilleure.Translation.PTC
 
         private readonly Ptc _ptc;
 
-        private readonly System.Timers.Timer _timer;
+        private readonly Timer _timer;
 
         private readonly ulong _outerHeaderMagic;
 
@@ -51,7 +58,7 @@ namespace ARMeilleure.Translation.PTC
         {
             _ptc = ptc;
 
-            _timer = new System.Timers.Timer((double)SaveInterval * 1000d);
+            _timer = new Timer(SaveInterval * 1000d);
             _timer.Elapsed += PreSave;
 
             _outerHeaderMagic = BinaryPrimitives.ReadUInt64LittleEndian(EncodingCache.UTF8NoBOM.GetBytes(OuterHeaderMagicString).AsSpan());
@@ -168,7 +175,7 @@ namespace ARMeilleure.Translation.PTC
                     return false;
                 }
 
-                if (outerHeader.InfoFileVersion != InternalVersion)
+                if (outerHeader.InfoFileVersion != InternalVersion && !_migrateInternalVersions.Contains(outerHeader.InfoFileVersion))
                 {
                     InvalidateCompressedStream(compressedStream);
 
@@ -211,7 +218,19 @@ namespace ARMeilleure.Translation.PTC
                     return false;
                 }
 
-                ProfiledFuncs = Deserialize(stream);
+                switch (outerHeader.InfoFileVersion)
+                {
+                    case InternalVersion:
+                        ProfiledFuncs = Deserialize(stream);
+                        break;
+                    case 1866:
+                        ProfiledFuncs = Deserialize(stream, (address, profile) => (address + 0x500000UL, profile));
+                        break;
+                    default:
+                        Logger.Error?.Print(LogClass.Ptc, $"No migration path for {nameof(outerHeader.InfoFileVersion)} '{outerHeader.InfoFileVersion}'. Discarding cache.");
+                        InvalidateCompressedStream(compressedStream);
+                        return false;
+                }
 
                 Debug.Assert(stream.Position == stream.Length);
 
@@ -225,9 +244,14 @@ namespace ARMeilleure.Translation.PTC
             return true;
         }
 
-        private static Dictionary<ulong, FuncProfile> Deserialize(Stream stream)
+        private static Dictionary<ulong, FuncProfile> Deserialize(Stream stream, Func<ulong, FuncProfile, (ulong, FuncProfile)> migrateEntryFunc = null)
         {
-            return DeserializeDictionary<ulong, FuncProfile>(stream, (stream) => DeserializeStructure<FuncProfile>(stream));
+            if (migrateEntryFunc != null)
+            {
+                return DeserializeAndUpdateDictionary(stream, DeserializeStructure<FuncProfile>, migrateEntryFunc);
+            }
+
+            return DeserializeDictionary<ulong, FuncProfile>(stream, DeserializeStructure<FuncProfile>);
         }
 
         private static ReadOnlySpan<byte> GetReadOnlySpan(MemoryStream memoryStream)
@@ -240,7 +264,7 @@ namespace ARMeilleure.Translation.PTC
             compressedStream.SetLength(0L);
         }
 
-        private void PreSave(object source, System.Timers.ElapsedEventArgs e)
+        private void PreSave(object source, ElapsedEventArgs e)
         {
             _waitEvent.Reset();
 
@@ -277,7 +301,7 @@ namespace ARMeilleure.Translation.PTC
             {
                 Debug.Assert(stream.Seek(0L, SeekOrigin.Begin) == 0L && stream.Length == 0L);
 
-                stream.Seek((long)Unsafe.SizeOf<Hash128>(), SeekOrigin.Begin);
+                stream.Seek(Unsafe.SizeOf<Hash128>(), SeekOrigin.Begin);
 
                 lock (_lock)
                 {
@@ -288,7 +312,7 @@ namespace ARMeilleure.Translation.PTC
 
                 Debug.Assert(stream.Position == stream.Length);
 
-                stream.Seek((long)Unsafe.SizeOf<Hash128>(), SeekOrigin.Begin);
+                stream.Seek(Unsafe.SizeOf<Hash128>(), SeekOrigin.Begin);
                 Hash128 hash = XXHash128.ComputeHash(GetReadOnlySpan(stream));
 
                 stream.Seek(0L, SeekOrigin.Begin);
@@ -332,7 +356,7 @@ namespace ARMeilleure.Translation.PTC
 
         private static void Serialize(Stream stream, Dictionary<ulong, FuncProfile> profiledFuncs)
         {
-            SerializeDictionary(stream, profiledFuncs, (stream, structure) => SerializeStructure(stream, structure));
+            SerializeDictionary(stream, profiledFuncs, SerializeStructure);
         }
 
         [StructLayout(LayoutKind.Sequential, Pack = 1/*, Size = 29*/)]

src/Ryujinx.Audio.Backends.OpenAL/OpenALHardwareDeviceDriver.cs

@@ -31,7 +31,7 @@ namespace Ryujinx.Audio.Backends.OpenAL
             _stillRunning = true;
             _updaterThread = new Thread(Update)
             {
-                Name = "HardwareDeviceDriver.OpenAL"
+                Name = "HardwareDeviceDriver.OpenAL",
             };
 
             _updaterThread.Start();

src/Ryujinx.Audio.Backends.OpenAL/OpenALHardwareDeviceSession.cs

@@ -67,7 +67,7 @@ namespace Ryujinx.Audio.Backends.OpenAL
                 {
                     DriverIdentifier = buffer.DataPointer,
                     BufferId = AL.GenBuffer(),
-                    SampleCount = GetSampleCount(buffer)
+                    SampleCount = GetSampleCount(buffer),
                 };
 
                 AL.BufferData(driverBuffer.BufferId, _targetFormat, buffer.Data, (int)RequestedSampleRate);

src/Ryujinx.Audio.Backends.SDL2/SDL2HardwareDeviceDriver.cs

@@ -7,7 +7,6 @@ using System;
 using System.Collections.Concurrent;
 using System.Runtime.InteropServices;
 using System.Threading;
-
 using static Ryujinx.Audio.Integration.IHardwareDeviceDriver;
 using static SDL2.SDL;
 
@@ -111,7 +110,7 @@ namespace Ryujinx.Audio.Backends.SDL2
                 channels = (byte)requestedChannelCount,
                 format = GetSDL2Format(requestedSampleFormat),
                 freq = (int)requestedSampleRate,
-                samples = (ushort)sampleCount
+                samples = (ushort)sampleCount,
             };
         }
 

src/Ryujinx.Audio.Backends.SoundIo/Native/SoundIoBackend.cs

@@ -8,6 +8,6 @@
         Alsa = 3,
         CoreAudio = 4,
         Wasapi = 5,
-        Dummy = 6
+        Dummy = 6,
     }
 }

src/Ryujinx.Audio.Backends.SoundIo/Native/SoundIoDeviceAim.cs

@@ -3,6 +3,6 @@
     public enum SoundIoDeviceAim
     {
         SoundIoDeviceAimInput = 0,
-        SoundIoDeviceAimOutput = 1
+        SoundIoDeviceAimOutput = 1,
     }
 }

src/Ryujinx.Audio/AudioManager.cs

@@ -16,17 +16,17 @@ namespace Ryujinx.Audio
         /// <summary>
         /// Events signaled when the driver played audio buffers.
         /// </summary>
-        private ManualResetEvent[] _updateRequiredEvents;
+        private readonly ManualResetEvent[] _updateRequiredEvents;
 
         /// <summary>
         /// Action to execute when the driver played audio buffers.
         /// </summary>
-        private Action[] _actions;
+        private readonly Action[] _actions;
 
         /// <summary>
         /// The worker thread in charge of handling sessions update.
         /// </summary>
-        private Thread _workerThread;
+        private readonly Thread _workerThread;
 
         private bool _isRunning;
 
@@ -44,7 +44,7 @@ namespace Ryujinx.Audio
 
             _workerThread = new Thread(Update)
             {
-                Name = "AudioManager.Worker"
+                Name = "AudioManager.Worker",
             };
         }
 
@@ -115,6 +115,7 @@ namespace Ryujinx.Audio
 
         public void Dispose()
         {
+            GC.SuppressFinalize(this);
             Dispose(true);
         }
 
@@ -129,4 +130,4 @@ namespace Ryujinx.Audio
             }
         }
     }
-}
+}

src/Ryujinx.Audio/Backends/Common/BackendHelper.cs

@@ -23,4 +23,4 @@ namespace Ryujinx.Audio.Backends.Common
             return bufferSize / GetSampleSize(format) / channelCount;
         }
     }
-}
+}

src/Ryujinx.Audio/Backends/Common/DynamicRingBuffer.cs

@@ -163,4 +163,4 @@ namespace Ryujinx.Audio.Backends.Common
             }
         }
     }
-}
+}

src/Ryujinx.Audio/Backends/Common/HardwareDeviceSessionOutputBase.cs

@@ -66,14 +66,11 @@ namespace Ryujinx.Audio.Backends.Common
                 return false;
             }
 
-            if (buffer.Data == null)
-            {
-                buffer.Data = samples;
-            }
+            buffer.Data ??= samples;
 
             return true;
         }
 
         public virtual void UnregisterBuffer(AudioBuffer buffer) { }
     }
-}
+}

src/Ryujinx.Audio/Backends/CompatLayer/CompatLayerHardwareDeviceDriver.cs

@@ -6,14 +6,13 @@ using Ryujinx.Common.Logging;
 using Ryujinx.Memory;
 using System;
 using System.Threading;
-
 using static Ryujinx.Audio.Integration.IHardwareDeviceDriver;
 
 namespace Ryujinx.Audio.Backends.CompatLayer
 {
     public class CompatLayerHardwareDeviceDriver : IHardwareDeviceDriver
     {
-        private IHardwareDeviceDriver _realDriver;
+        private readonly IHardwareDeviceDriver _realDriver;
 
         public static bool IsSupported => true;
 
@@ -24,6 +23,7 @@ namespace Ryujinx.Audio.Backends.CompatLayer
 
         public void Dispose()
         {
+            GC.SuppressFinalize(this);
             _realDriver.Dispose();
         }
 
@@ -49,7 +49,7 @@ namespace Ryujinx.Audio.Backends.CompatLayer
                 6 => SelectHardwareChannelCount(2),
                 2 => SelectHardwareChannelCount(1),
                 1 => throw new ArgumentException("No valid channel configuration found!"),
-                _ => throw new ArgumentException($"Invalid targetChannelCount {targetChannelCount}")
+                _ => throw new ArgumentException($"Invalid targetChannelCount {targetChannelCount}"),
             };
         }
 
@@ -110,7 +110,7 @@ namespace Ryujinx.Audio.Backends.CompatLayer
                 {
                     Logger.Warning?.Print(LogClass.Audio, "The selected audio backend doesn't support audio input, fallback to dummy...");
 
-                    return new DummyHardwareDeviceSessionInput(this, memoryManager, sampleFormat, sampleRate, channelCount);
+                    return new DummyHardwareDeviceSessionInput(this, memoryManager);
                 }
 
                 throw new NotImplementedException();
@@ -138,12 +138,12 @@ namespace Ryujinx.Audio.Backends.CompatLayer
 
             if (direction == Direction.Input)
             {
-                Logger.Warning?.Print(LogClass.Audio, $"The selected audio backend doesn't support the requested audio input configuration, fallback to dummy...");
+                Logger.Warning?.Print(LogClass.Audio, "The selected audio backend doesn't support the requested audio input configuration, fallback to dummy...");
 
                 // TODO: We currently don't support audio input upsampling/downsampling, implement this.
                 realSession.Dispose();
 
-                return new DummyHardwareDeviceSessionInput(this, memoryManager, sampleFormat, sampleRate, channelCount);
+                return new DummyHardwareDeviceSessionInput(this, memoryManager);
             }
 
             // It must be a HardwareDeviceSessionOutputBase.
@@ -183,4 +183,4 @@ namespace Ryujinx.Audio.Backends.CompatLayer
             return direction == Direction.Input || direction == Direction.Output;
         }
     }
-}
+}

src/Ryujinx.Audio/Backends/CompatLayer/CompatLayerHardwareDeviceSession.cs

@@ -8,9 +8,9 @@ namespace Ryujinx.Audio.Backends.CompatLayer
 {
     class CompatLayerHardwareDeviceSession : HardwareDeviceSessionOutputBase
     {
-        private HardwareDeviceSessionOutputBase _realSession;
-        private SampleFormat _userSampleFormat;
-        private uint _userChannelCount;
+        private readonly HardwareDeviceSessionOutputBase _realSession;
+        private readonly SampleFormat _userSampleFormat;
+        private readonly uint _userChannelCount;
 
         public CompatLayerHardwareDeviceSession(HardwareDeviceSessionOutputBase realSession, SampleFormat userSampleFormat, uint userChannelCount) : base(realSession.MemoryManager, realSession.RequestedSampleFormat, realSession.RequestedSampleRate, userChannelCount)
         {
@@ -116,11 +116,11 @@ namespace Ryujinx.Audio.Backends.CompatLayer
                 samples = MemoryMarshal.Cast<short, byte>(samplesPCM16).ToArray();
             }
 
-            AudioBuffer fakeBuffer = new AudioBuffer
+            AudioBuffer fakeBuffer = new()
             {
                 BufferTag = buffer.BufferTag,
                 DataPointer = buffer.DataPointer,
-                DataSize = (ulong)samples.Length
+                DataSize = (ulong)samples.Length,
             };
 
             bool result = _realSession.RegisterBuffer(fakeBuffer, samples);
@@ -159,4 +159,4 @@ namespace Ryujinx.Audio.Backends.CompatLayer
             return _realSession.WasBufferFullyConsumed(buffer);
         }
     }
-}
+}

src/Ryujinx.Audio/Backends/CompatLayer/Downmixing.cs

@@ -31,18 +31,18 @@ namespace Ryujinx.Audio.Backends.CompatLayer
         private const int Minus6dBInQ15 = (int)(0.501f * RawQ15One);
         private const int Minus12dBInQ15 = (int)(0.251f * RawQ15One);
 
-        private static readonly int[] DefaultSurroundToStereoCoefficients = new int[4]
+        private static readonly int[] _defaultSurroundToStereoCoefficients = new int[4]
         {
             RawQ15One,
             Minus3dBInQ15,
             Minus12dBInQ15,
-            Minus3dBInQ15
+            Minus3dBInQ15,
         };
 
-        private static readonly int[] DefaultStereoToMonoCoefficients = new int[2]
+        private static readonly int[] _defaultStereoToMonoCoefficients = new int[2]
         {
             Minus6dBInQ15,
-            Minus6dBInQ15
+            Minus6dBInQ15,
         };
 
         private const int SurroundChannelCount = 6;
@@ -114,12 +114,12 @@ namespace Ryujinx.Audio.Backends.CompatLayer
 
         public static short[] DownMixStereoToMono(ReadOnlySpan<short> data)
         {
-            return DownMixStereoToMono(DefaultStereoToMonoCoefficients, data);
+            return DownMixStereoToMono(_defaultStereoToMonoCoefficients, data);
         }
 
         public static short[] DownMixSurroundToStereo(ReadOnlySpan<short> data)
         {
-            return DownMixSurroundToStereo(DefaultSurroundToStereoCoefficients, data);
+            return DownMixSurroundToStereo(_defaultSurroundToStereoCoefficients, data);
         }
     }
-}
+}

src/Ryujinx.Audio/Backends/Dummy/DummyHardwareDeviceDriver.cs

@@ -1,16 +1,16 @@
 using Ryujinx.Audio.Common;
 using Ryujinx.Audio.Integration;
 using Ryujinx.Memory;
+using System;
 using System.Threading;
-
 using static Ryujinx.Audio.Integration.IHardwareDeviceDriver;
 
 namespace Ryujinx.Audio.Backends.Dummy
 {
     public class DummyHardwareDeviceDriver : IHardwareDeviceDriver
     {
-        private ManualResetEvent _updateRequiredEvent;
-        private ManualResetEvent _pauseEvent;
+        private readonly ManualResetEvent _updateRequiredEvent;
+        private readonly ManualResetEvent _pauseEvent;
 
         public static bool IsSupported => true;
 
@@ -36,10 +36,8 @@ namespace Ryujinx.Audio.Backends.Dummy
             {
                 return new DummyHardwareDeviceSessionOutput(this, memoryManager, sampleFormat, sampleRate, channelCount, volume);
             }
-            else
-            {
-                return new DummyHardwareDeviceSessionInput(this, memoryManager, sampleFormat, sampleRate, channelCount);
-            }
+
+            return new DummyHardwareDeviceSessionInput(this, memoryManager);
         }
 
         public ManualResetEvent GetUpdateRequiredEvent()
@@ -54,6 +52,7 @@ namespace Ryujinx.Audio.Backends.Dummy
 
         public void Dispose()
         {
+            GC.SuppressFinalize(this);
             Dispose(true);
         }
 
@@ -86,4 +85,4 @@ namespace Ryujinx.Audio.Backends.Dummy
             return channelCount == 1 || channelCount == 2 || channelCount == 6;
         }
     }
-}
+}

src/Ryujinx.Audio/Backends/Dummy/DummyHardwareDeviceSessionInput.cs

@@ -8,10 +8,10 @@ namespace Ryujinx.Audio.Backends.Dummy
     class DummyHardwareDeviceSessionInput : IHardwareDeviceSession
     {
         private float _volume;
-        private IHardwareDeviceDriver _manager;
-        private IVirtualMemoryManager _memoryManager;
+        private readonly IHardwareDeviceDriver _manager;
+        private readonly IVirtualMemoryManager _memoryManager;
 
-        public DummyHardwareDeviceSessionInput(IHardwareDeviceDriver manager, IVirtualMemoryManager memoryManager, SampleFormat requestedSampleFormat, uint requestedSampleRate, uint requestedChannelCount)
+        public DummyHardwareDeviceSessionInput(IHardwareDeviceDriver manager, IVirtualMemoryManager memoryManager)
         {
             _volume = 1.0f;
             _manager = manager;
@@ -64,4 +64,4 @@ namespace Ryujinx.Audio.Backends.Dummy
             return true;
         }
     }
-}
+}

src/Ryujinx.Audio/Backends/Dummy/DummyHardwareDeviceSessionOutput.cs

@@ -9,7 +9,7 @@ namespace Ryujinx.Audio.Backends.Dummy
     internal class DummyHardwareDeviceSessionOutput : HardwareDeviceSessionOutputBase
     {
         private float _volume;
-        private IHardwareDeviceDriver _manager;
+        private readonly IHardwareDeviceDriver _manager;
 
         private ulong _playedSampleCount;
 
@@ -59,4 +59,4 @@ namespace Ryujinx.Audio.Backends.Dummy
             return true;
         }
     }
-}
+}

src/Ryujinx.Audio/Common/AudioBuffer.cs

@@ -34,4 +34,4 @@ namespace Ryujinx.Audio.Common
         /// </summary>
         public byte[] Data;
     }
-}
+}

src/Ryujinx.Audio/Common/AudioDeviceSession.cs

@@ -23,7 +23,7 @@ namespace Ryujinx.Audio.Common
         /// <summary>
         /// Array of all buffers currently used or released.
         /// </summary>
-        private AudioBuffer[] _buffers;
+        private readonly AudioBuffer[] _buffers;
 
         /// <summary>
         /// The server index inside <see cref="_buffers"/> (appended but not queued to device driver).
@@ -58,17 +58,17 @@ namespace Ryujinx.Audio.Common
         /// <summary>
         /// The released buffer event.
         /// </summary>
-        private IWritableEvent _bufferEvent;
+        private readonly IWritableEvent _bufferEvent;
 
         /// <summary>
         /// The session on the device driver.
         /// </summary>
-        private IHardwareDeviceSession _hardwareDeviceSession;
+        private readonly IHardwareDeviceSession _hardwareDeviceSession;
 
         /// <summary>
         /// Max number of buffers that can be registered to the device driver at a time.
         /// </summary>
-        private uint _bufferRegisteredLimit;
+        private readonly uint _bufferRegisteredLimit;
 
         /// <summary>
         /// Create a new <see cref="AudioDeviceSession"/>.
@@ -311,9 +311,9 @@ namespace Ryujinx.Audio.Common
             return false;
         }
 
-        public bool AppendUacBuffer(AudioBuffer buffer, uint handle)
+        public static bool AppendUacBuffer(AudioBuffer buffer, uint handle)
         {
-            // NOTE: On hardware, there is another RegisterBuffer method taking an handle.
+            // NOTE: On hardware, there is another RegisterBuffer method taking a handle.
             // This variant of the call always return false (stubbed?) as a result this logic will never succeed.
 
             return false;
@@ -425,10 +425,8 @@ namespace Ryujinx.Audio.Common
             {
                 return 0;
             }
-            else
-            {
-                return _hardwareDeviceSession.GetPlayedSampleCount();
-            }
+
+            return _hardwareDeviceSession.GetPlayedSampleCount();
         }
 
         /// <summary>
@@ -515,4 +513,4 @@ namespace Ryujinx.Audio.Common
             }
         }
     }
-}
+}

src/Ryujinx.Audio/Common/AudioDeviceState.cs

@@ -13,6 +13,6 @@ namespace Ryujinx.Audio.Common
         /// <summary>
         /// The audio device is stopped.
         /// </summary>
-        Stopped
+        Stopped,
     }
-}
+}

src/Ryujinx.Audio/Common/AudioInputConfiguration.cs

@@ -24,6 +24,6 @@ namespace Ryujinx.Audio.Common
         /// <summary>
         /// Reserved/unused.
         /// </summary>
-        private ushort _reserved;
+        private readonly ushort _reserved;
     }
-}
+}

src/Ryujinx.Audio/Common/AudioOutputConfiguration.cs

@@ -34,4 +34,4 @@ namespace Ryujinx.Audio.Common
         /// </summary>
         public AudioDeviceState AudioOutState;
     }
-}
+}

src/Ryujinx.Audio/Common/AudioUserBuffer.cs

@@ -33,4 +33,4 @@ namespace Ryujinx.Audio.Common
         /// </summary>
         public ulong DataOffset;
     }
-}
+}

src/Ryujinx.Audio/Common/SampleFormat.cs

@@ -38,6 +38,6 @@ namespace Ryujinx.Audio.Common
         /// <summary>
         /// ADPCM sample format. (Also known as GC-ADPCM)
         /// </summary>
-        Adpcm = 6
+        Adpcm = 6,
     }
-}
+}

src/Ryujinx.Audio/Constants.cs

@@ -172,4 +172,4 @@ namespace Ryujinx.Audio
             0.707f,
         };
     }
-}
+}

src/Ryujinx.Audio/Input/AudioInputManager.cs

@@ -24,7 +24,7 @@ namespace Ryujinx.Audio.Input
         /// <summary>
         /// The session ids allocation table.
         /// </summary>
-        private int[] _sessionIds;
+        private readonly int[] _sessionIds;
 
         /// <summary>
         /// The device driver.
@@ -39,7 +39,7 @@ namespace Ryujinx.Audio.Input
         /// <summary>
         /// The <see cref="AudioInputSystem"/> session instances.
         /// </summary>
-        private AudioInputSystem[] _sessions;
+        private readonly AudioInputSystem[] _sessions;
 
         /// <summary>
         /// The count of active sessions.
@@ -166,6 +166,7 @@ namespace Ryujinx.Audio.Input
         /// </summary>
         /// <param name="filtered">If true, filter disconnected devices</param>
         /// <returns>The list of all audio inputs name</returns>
+#pragma warning disable CA1822 // Mark member as static
         public string[] ListAudioIns(bool filtered)
         {
             if (filtered)
@@ -173,8 +174,9 @@ namespace Ryujinx.Audio.Input
                 // TODO: Detect if the driver supports audio input
             }
 
-            return new string[] { Constants.DefaultDeviceInputName };
+            return new[] { Constants.DefaultDeviceInputName };
         }
+#pragma warning restore CA1822
 
         /// <summary>
         /// Open a new <see cref="AudioInputSystem"/>.
@@ -205,7 +207,7 @@ namespace Ryujinx.Audio.Input
 
             IHardwareDeviceSession deviceSession = _deviceDriver.OpenDeviceSession(IHardwareDeviceDriver.Direction.Input, memoryManager, sampleFormat, parameter.SampleRate, parameter.ChannelCount);
 
-            AudioInputSystem audioIn = new AudioInputSystem(this, _lock, deviceSession, _sessionsBufferEvents[sessionId]);
+            AudioInputSystem audioIn = new(this, _lock, deviceSession, _sessionsBufferEvents[sessionId]);
 
             ResultCode result = audioIn.Initialize(inputDeviceName, sampleFormat, ref parameter, sessionId);
 
@@ -238,6 +240,8 @@ namespace Ryujinx.Audio.Input
 
         public void Dispose()
         {
+            GC.SuppressFinalize(this);
+
             if (Interlocked.CompareExchange(ref _disposeState, 1, 0) == 0)
             {
                 Dispose(true);
@@ -263,4 +267,4 @@ namespace Ryujinx.Audio.Input
             }
         }
     }
-}
+}

src/Ryujinx.Audio/Input/AudioInputSystem.cs

@@ -18,7 +18,7 @@ namespace Ryujinx.Audio.Input
         /// <summary>
         /// The session the <see cref="AudioInputSystem"/>.
         /// </summary>
-        private AudioDeviceSession _session;
+        private readonly AudioDeviceSession _session;
 
         /// <summary>
         /// The target device name of the <see cref="AudioInputSystem"/>.
@@ -43,7 +43,7 @@ namespace Ryujinx.Audio.Input
         /// <summary>
         /// The <see cref="AudioInputManager"/> owning this.
         /// </summary>
-        private AudioInputManager _manager;
+        private readonly AudioInputManager _manager;
 
         /// <summary>
         /// The lock of the parent.
@@ -90,11 +90,13 @@ namespace Ryujinx.Audio.Input
             {
                 return ResultCode.DeviceNotFound;
             }
-            else if (configuration.SampleRate != 0 && configuration.SampleRate != Constants.TargetSampleRate)
+
+            if (configuration.SampleRate != 0 && configuration.SampleRate != Constants.TargetSampleRate)
             {
                 return ResultCode.UnsupportedSampleRate;
             }
-            else if (configuration.ChannelCount != 0 && configuration.ChannelCount != 1 && configuration.ChannelCount != 2 && configuration.ChannelCount != 6)
+
+            if (configuration.ChannelCount != 0 && configuration.ChannelCount != 1 && configuration.ChannelCount != 2 && configuration.ChannelCount != 6)
             {
                 return ResultCode.UnsupportedChannelConfiguration;
             }
@@ -185,11 +187,11 @@ namespace Ryujinx.Audio.Input
         {
             lock (_parentLock)
             {
-                AudioBuffer buffer = new AudioBuffer
+                AudioBuffer buffer = new()
                 {
                     BufferTag = bufferTag,
                     DataPointer = userBuffer.Data,
-                    DataSize = userBuffer.DataSize
+                    DataSize = userBuffer.DataSize,
                 };
 
                 if (_session.AppendBuffer(buffer))
@@ -213,14 +215,14 @@ namespace Ryujinx.Audio.Input
         {
             lock (_parentLock)
             {
-                AudioBuffer buffer = new AudioBuffer
+                AudioBuffer buffer = new()
                 {
                     BufferTag = bufferTag,
                     DataPointer = userBuffer.Data,
-                    DataSize = userBuffer.DataSize
+                    DataSize = userBuffer.DataSize,
                 };
 
-                if (_session.AppendUacBuffer(buffer, handle))
+                if (AudioDeviceSession.AppendUacBuffer(buffer, handle))
                 {
                     return ResultCode.Success;
                 }
@@ -373,6 +375,8 @@ namespace Ryujinx.Audio.Input
 
         public void Dispose()
         {
+            GC.SuppressFinalize(this);
+
             if (Interlocked.CompareExchange(ref _disposeState, 1, 0) == 0)
             {
                 Dispose(true);
@@ -389,4 +393,4 @@ namespace Ryujinx.Audio.Input
             }
         }
     }
-}
+}

src/Ryujinx.Audio/Integration/HardwareDeviceImpl.cs

@@ -6,12 +6,12 @@ namespace Ryujinx.Audio.Integration
 {
     public class HardwareDeviceImpl : IHardwareDevice
     {
-        private IHardwareDeviceSession _session;
-        private uint _channelCount;
-        private uint _sampleRate;
+        private readonly IHardwareDeviceSession _session;
+        private readonly uint _channelCount;
+        private readonly uint _sampleRate;
         private uint _currentBufferTag;
 
-        private byte[] _buffer;
+        private readonly byte[] _buffer;
 
         public HardwareDeviceImpl(IHardwareDeviceDriver deviceDriver, uint channelCount, uint sampleRate, float volume)
         {
@@ -36,7 +36,7 @@ namespace Ryujinx.Audio.Integration
                 DataSize = (ulong)_buffer.Length,
             });
 
-            _currentBufferTag = _currentBufferTag % 4;
+            _currentBufferTag %= 4;
         }
 
         public void SetVolume(float volume)
@@ -61,6 +61,7 @@ namespace Ryujinx.Audio.Integration
 
         public void Dispose()
         {
+            GC.SuppressFinalize(this);
             Dispose(true);
         }
 
@@ -72,4 +73,4 @@ namespace Ryujinx.Audio.Integration
             }
         }
     }
-}
+}

src/Ryujinx.Audio/Integration/IHardwareDevice.cs

@@ -52,4 +52,4 @@ namespace Ryujinx.Audio.Integration
             return channelCount != Constants.ChannelCountMax;
         }
     }
-}
+}

src/Ryujinx.Audio/Integration/IHardwareDeviceDriver.cs

@@ -13,7 +13,7 @@ namespace Ryujinx.Audio.Integration
         public enum Direction
         {
             Input,
-            Output
+            Output,
         }
 
         IHardwareDeviceSession OpenDeviceSession(Direction direction, IVirtualMemoryManager memoryManager, SampleFormat sampleFormat, uint sampleRate, uint channelCount, float volume = 1f);
@@ -33,4 +33,4 @@ namespace Ryujinx.Audio.Integration
             return this;
         }
     }
-}
+}

src/Ryujinx.Audio/Integration/IHardwareDeviceSession.cs

@@ -25,4 +25,4 @@ namespace Ryujinx.Audio.Integration
 
         void PrepareToClose();
     }
-}
+}

src/Ryujinx.Audio/Integration/IWritableEvent.cs

@@ -15,4 +15,4 @@ namespace Ryujinx.Audio.Integration
         /// </summary>
         void Clear();
     }
-}
+}

src/Ryujinx.Audio/Output/AudioOutputManager.cs

@@ -24,7 +24,7 @@ namespace Ryujinx.Audio.Output
         /// <summary>
         /// The session ids allocation table.
         /// </summary>
-        private int[] _sessionIds;
+        private readonly int[] _sessionIds;
 
         /// <summary>
         /// The device driver.
@@ -39,7 +39,7 @@ namespace Ryujinx.Audio.Output
         /// <summary>
         /// The <see cref="AudioOutputSystem"/> session instances.
         /// </summary>
-        private AudioOutputSystem[] _sessions;
+        private readonly AudioOutputSystem[] _sessions;
 
         /// <summary>
         /// The count of active sessions.
@@ -165,10 +165,12 @@ namespace Ryujinx.Audio.Output
         /// Get the list of all audio outputs name.
         /// </summary>
         /// <returns>The list of all audio outputs name</returns>
+#pragma warning disable CA1822 // Mark member as static
         public string[] ListAudioOuts()
         {
-            return new string[] { Constants.DefaultDeviceOutputName };
+            return new[] { Constants.DefaultDeviceOutputName };
         }
+#pragma warning restore CA1822
 
         /// <summary>
         /// Open a new <see cref="AudioOutputSystem"/>.
@@ -182,6 +184,7 @@ namespace Ryujinx.Audio.Output
         /// <param name="parameter">The user configuration</param>
         /// <param name="appletResourceUserId">The applet resource user id of the application</param>
         /// <param name="processHandle">The process handle of the application</param>
+        /// <param name="volume">The volume level to request</param>
         /// <returns>A <see cref="ResultCode"/> reporting an error or a success</returns>
         public ResultCode OpenAudioOut(out string outputDeviceName,
                                        out AudioOutputConfiguration outputConfiguration,
@@ -200,7 +203,7 @@ namespace Ryujinx.Audio.Output
 
             IHardwareDeviceSession deviceSession = _deviceDriver.OpenDeviceSession(IHardwareDeviceDriver.Direction.Output, memoryManager, sampleFormat, parameter.SampleRate, parameter.ChannelCount, volume);
 
-            AudioOutputSystem audioOut = new AudioOutputSystem(this, _lock, deviceSession, _sessionsBufferEvents[sessionId]);
+            AudioOutputSystem audioOut = new(this, _lock, deviceSession, _sessionsBufferEvents[sessionId]);
 
             ResultCode result = audioOut.Initialize(inputDeviceName, sampleFormat, ref parameter, sessionId);
 
@@ -268,6 +271,8 @@ namespace Ryujinx.Audio.Output
 
         public void Dispose()
         {
+            GC.SuppressFinalize(this);
+
             if (Interlocked.CompareExchange(ref _disposeState, 1, 0) == 0)
             {
                 Dispose(true);
@@ -293,4 +298,4 @@ namespace Ryujinx.Audio.Output
             }
         }
     }
-}
+}

src/Ryujinx.Audio/Output/AudioOutputSystem.cs

@@ -18,7 +18,7 @@ namespace Ryujinx.Audio.Output
         /// <summary>
         /// The session the <see cref="AudioOutputSystem"/>.
         /// </summary>
-        private AudioDeviceSession _session;
+        private readonly AudioDeviceSession _session;
 
         /// <summary>
         /// The target device name of the <see cref="AudioOutputSystem"/>.
@@ -43,7 +43,7 @@ namespace Ryujinx.Audio.Output
         /// <summary>
         /// The <see cref="AudioOutputManager"/> owning this.
         /// </summary>
-        private AudioOutputManager _manager;
+        private readonly AudioOutputManager _manager;
 
         /// <summary>
         /// THe lock of the parent.
@@ -90,11 +90,13 @@ namespace Ryujinx.Audio.Output
             {
                 return ResultCode.DeviceNotFound;
             }
-            else if (configuration.SampleRate != 0 && configuration.SampleRate != Constants.TargetSampleRate)
+
+            if (configuration.SampleRate != 0 && configuration.SampleRate != Constants.TargetSampleRate)
             {
                 return ResultCode.UnsupportedSampleRate;
             }
-            else if (configuration.ChannelCount != 0 && configuration.ChannelCount != 1 && configuration.ChannelCount != 2 && configuration.ChannelCount != 6)
+
+            if (configuration.ChannelCount != 0 && configuration.ChannelCount != 1 && configuration.ChannelCount != 2 && configuration.ChannelCount != 6)
             {
                 return ResultCode.UnsupportedChannelConfiguration;
             }
@@ -185,11 +187,11 @@ namespace Ryujinx.Audio.Output
         {
             lock (_parentLock)
             {
-                AudioBuffer buffer = new AudioBuffer
+                AudioBuffer buffer = new()
                 {
                     BufferTag = bufferTag,
                     DataPointer = userBuffer.Data,
-                    DataSize = userBuffer.DataSize
+                    DataSize = userBuffer.DataSize,
                 };
 
                 if (_session.AppendBuffer(buffer))
@@ -346,6 +348,8 @@ namespace Ryujinx.Audio.Output
 
         public void Dispose()
         {
+            GC.SuppressFinalize(this);
+
             if (Interlocked.CompareExchange(ref _disposeState, 1, 0) == 0)
             {
                 Dispose(true);
@@ -362,4 +366,4 @@ namespace Ryujinx.Audio.Output
             }
         }
     }
-}
+}

src/Ryujinx.Audio/Renderer/Common/AuxiliaryBufferAddresses.cs

@@ -10,4 +10,4 @@ namespace Ryujinx.Audio.Renderer.Common
         public ulong ReturnBufferInfo;
         public ulong ReturnBufferInfoBase;
     }
-}
+}

src/Ryujinx.Audio/Renderer/Common/BehaviourParameter.cs

@@ -16,7 +16,7 @@ namespace Ryujinx.Audio.Renderer.Common
         /// <summary>
         /// Reserved/padding.
         /// </summary>
-        private uint _padding;
+        private readonly uint _padding;
 
         /// <summary>
         /// The flags given controlling behaviour of the audio renderer
@@ -38,7 +38,7 @@ namespace Ryujinx.Audio.Renderer.Common
             /// <summary>
             /// Reserved/padding.
             /// </summary>
-            private uint _padding;
+            private readonly uint _padding;
 
             /// <summary>
             /// Extra information given with the <see cref="ResultCode"/>
@@ -47,4 +47,4 @@ namespace Ryujinx.Audio.Renderer.Common
             public ulong ExtraErrorInfo;
         }
     }
-}
+}

src/Ryujinx.Audio/Renderer/Common/EdgeMatrix.cs

@@ -147,4 +147,4 @@ namespace Ryujinx.Audio.Renderer.Common
             return _nodeCount;
         }
     }
-}
+}

src/Ryujinx.Audio/Renderer/Common/EffectType.cs

@@ -55,4 +55,4 @@ namespace Ryujinx.Audio.Renderer.Common
         /// </summary>
         Compressor,
     }
-}
+}

src/Ryujinx.Audio/Renderer/Common/MemoryPoolUserState.cs

@@ -38,6 +38,6 @@ namespace Ryujinx.Audio.Renderer.Common
         /// <summary>
         /// The memory pool is released. (client side only)
         /// </summary>
-        Released = 6
+        Released = 6,
     }
-}
+}

src/Ryujinx.Audio/Renderer/Common/NodeIdHelper.cs

@@ -25,4 +25,4 @@ namespace Ryujinx.Audio.Renderer.Common
             return (nodeId >> 16) & 0xFFF;
         }
     }
-}
+}

src/Ryujinx.Audio/Renderer/Common/NodeIdType.cs

@@ -28,6 +28,6 @@ namespace Ryujinx.Audio.Renderer.Common
         /// <summary>
         /// Performance monitoring related node id (performance commands)
         /// </summary>
-        Performance = 15
+        Performance = 15,
     }
-}
+}

src/Ryujinx.Audio/Renderer/Common/NodeStates.cs

@@ -53,17 +53,17 @@ namespace Ryujinx.Audio.Renderer.Common
         }
 
         private int _nodeCount;
-        private EdgeMatrix _discovered;
-        private EdgeMatrix _finished;
+        private readonly EdgeMatrix _discovered;
+        private readonly EdgeMatrix _finished;
         private Memory<int> _resultArray;
-        private Stack _stack;
+        private readonly Stack _stack;
         private int _tsortResultIndex;
 
         private enum NodeState : byte
         {
             Unknown,
             Discovered,
-            Finished
+            Finished,
         }
 
         public NodeStates()
@@ -88,16 +88,16 @@ namespace Ryujinx.Audio.Renderer.Common
 
             int edgeMatrixWorkBufferSize = EdgeMatrix.GetWorkBufferSize(nodeCount);
 
-            _discovered.Initialize(nodeStatesWorkBuffer.Slice(0, edgeMatrixWorkBufferSize), nodeCount);
+            _discovered.Initialize(nodeStatesWorkBuffer[..edgeMatrixWorkBufferSize], nodeCount);
             _finished.Initialize(nodeStatesWorkBuffer.Slice(edgeMatrixWorkBufferSize, edgeMatrixWorkBufferSize), nodeCount);
 
-            nodeStatesWorkBuffer = nodeStatesWorkBuffer.Slice(edgeMatrixWorkBufferSize * 2);
+            nodeStatesWorkBuffer = nodeStatesWorkBuffer[(edgeMatrixWorkBufferSize * 2)..];
 
-            _resultArray = SpanMemoryManager<int>.Cast(nodeStatesWorkBuffer.Slice(0, sizeof(int) * nodeCount));
+            _resultArray = SpanMemoryManager<int>.Cast(nodeStatesWorkBuffer[..(sizeof(int) * nodeCount)]);
 
-            nodeStatesWorkBuffer = nodeStatesWorkBuffer.Slice(sizeof(int) * nodeCount);
+            nodeStatesWorkBuffer = nodeStatesWorkBuffer[(sizeof(int) * nodeCount)..];
 
-            Memory<int> stackWorkBuffer = SpanMemoryManager<int>.Cast(nodeStatesWorkBuffer.Slice(0, Stack.CalcBufferSize(nodeCount * nodeCount)));
+            Memory<int> stackWorkBuffer = SpanMemoryManager<int>.Cast(nodeStatesWorkBuffer[..Stack.CalcBufferSize(nodeCount * nodeCount)]);
 
             _stack.Reset(stackWorkBuffer, nodeCount * nodeCount);
         }
@@ -120,7 +120,8 @@ namespace Ryujinx.Audio.Renderer.Common
 
                 return NodeState.Discovered;
             }
-            else if (_finished.Test(index))
+
+            if (_finished.Test(index))
             {
                 Debug.Assert(!_discovered.Test(index));
 
@@ -158,7 +159,7 @@ namespace Ryujinx.Audio.Renderer.Common
 
         public ReadOnlySpan<int> GetTsortResult()
         {
-            return _resultArray.Span.Slice(0, _tsortResultIndex);
+            return _resultArray.Span[.._tsortResultIndex];
         }
 
         public bool Sort(EdgeMatrix edgeMatrix)
@@ -226,4 +227,4 @@ namespace Ryujinx.Audio.Renderer.Common
             return true;
         }
     }
-}
+}

src/Ryujinx.Audio/Renderer/Common/PerformanceDetailType.cs

@@ -15,6 +15,6 @@ namespace Ryujinx.Audio.Renderer.Common
         PcmFloat,
         Limiter,
         CaptureBuffer,
-        Compressor
+        Compressor,
     }
-}
+}

src/Ryujinx.Audio/Renderer/Common/PerformanceEntryType.cs

@@ -6,6 +6,6 @@ namespace Ryujinx.Audio.Renderer.Common
         Voice,
         SubMix,
         FinalMix,
-        Sink
+        Sink,
     }
-}
+}

src/Ryujinx.Audio/Renderer/Common/PlayState.cs

@@ -18,6 +18,6 @@ namespace Ryujinx.Audio.Renderer.Common
         /// <summary>
         /// The user request the voice to be paused.
         /// </summary>
-        Pause
+        Pause,
     }
-}
+}

src/Ryujinx.Audio/Renderer/Common/ReverbEarlyMode.cs

@@ -28,6 +28,6 @@ namespace Ryujinx.Audio.Renderer.Common
         /// <summary>
         /// No early reflection.
         /// </summary>
-        Disabled
+        Disabled,
     }
-}
+}

src/Ryujinx.Audio/Renderer/Common/ReverbLateMode.cs

@@ -33,6 +33,6 @@ namespace Ryujinx.Audio.Renderer.Common
         /// <summary>
         /// Max delay. (used for delay line limits)
         /// </summary>
-        Limit = NoDelay
+        Limit = NoDelay,
     }
-}
+}

src/Ryujinx.Audio/Renderer/Common/SinkType.cs

@@ -18,6 +18,6 @@ namespace Ryujinx.Audio.Renderer.Common
         /// <summary>
         /// The sink is a circular buffer.
         /// </summary>
-        CircularBuffer
+        CircularBuffer,
     }
-}
+}

src/Ryujinx.Audio/Renderer/Common/UpdateDataHeader.cs

@@ -1,3 +1,4 @@
+using Ryujinx.Common.Memory;
 using System.Runtime.CompilerServices;
 
 namespace Ryujinx.Audio.Renderer.Common
@@ -19,7 +20,9 @@ namespace Ryujinx.Audio.Renderer.Common
         public uint Unknown24;
         public uint RenderInfoSize;
 
-        private unsafe fixed int _reserved[4];
+#pragma warning disable IDE0051, CS0169 // Remove unused field
+        private Array4<int> _reserved;
+#pragma warning restore IDE0051, CS0169
 
         public uint TotalSize;
 
@@ -30,4 +33,4 @@ namespace Ryujinx.Audio.Renderer.Common
             TotalSize = (uint)Unsafe.SizeOf<UpdateDataHeader>();
         }
     }
-}
+}

src/Ryujinx.Audio/Renderer/Common/VoiceUpdateState.cs

@@ -101,4 +101,4 @@ namespace Ryujinx.Audio.Renderer.Common
             }
         }
     }
-}
+}

src/Ryujinx.Audio/Renderer/Common/WaveBuffer.cs

@@ -1,5 +1,4 @@
 using System.Runtime.InteropServices;
-
 using DspAddr = System.UInt64;
 
 namespace Ryujinx.Audio.Renderer.Common
@@ -77,6 +76,6 @@ namespace Ryujinx.Audio.Renderer.Common
         /// <summary>
         /// Padding/Reserved.
         /// </summary>
-        private ushort _padding;
+        private readonly ushort _padding;
     }
-}
+}

src/Ryujinx.Audio/Renderer/Common/WorkBufferAllocator.cs

@@ -23,7 +23,7 @@ namespace Ryujinx.Audio.Renderer.Common
 
             if (size != 0)
             {
-                ulong alignedOffset = BitUtils.AlignUp<ulong>(Offset, (ulong)align);
+                ulong alignedOffset = BitUtils.AlignUp(Offset, (ulong)align);
 
                 if (alignedOffset + size <= (ulong)BackingMemory.Length)
                 {
@@ -32,7 +32,7 @@ namespace Ryujinx.Audio.Renderer.Common
                     Offset = alignedOffset + size;
 
                     // Clear the memory to be sure that is does not contain any garbage.
-                    result.Span.Fill(0);
+                    result.Span.Clear();
 
                     return result;
                 }
@@ -55,7 +55,7 @@ namespace Ryujinx.Audio.Renderer.Common
 
         public static ulong GetTargetSize<T>(ulong currentSize, ulong count, int align) where T : unmanaged
         {
-            return BitUtils.AlignUp<ulong>(currentSize, (ulong)align) + (ulong)Unsafe.SizeOf<T>() * count;
+            return BitUtils.AlignUp(currentSize, (ulong)align) + (ulong)Unsafe.SizeOf<T>() * count;
         }
     }
-}
+}

src/Ryujinx.Audio/Renderer/Device/VirtualDevice.cs

@@ -12,11 +12,11 @@ namespace Ryujinx.Audio.Renderer.Device
         /// </summary>
         public static readonly VirtualDevice[] Devices = new VirtualDevice[5]
         {
-            new VirtualDevice("AudioStereoJackOutput", 2, true),
-            new VirtualDevice("AudioBuiltInSpeakerOutput", 2, false),
-            new VirtualDevice("AudioTvOutput", 6, false),
-            new VirtualDevice("AudioUsbDeviceOutput", 2, true),
-            new VirtualDevice("AudioExternalOutput", 6, true),
+            new("AudioStereoJackOutput", 2, true),
+            new("AudioBuiltInSpeakerOutput", 2, false),
+            new("AudioTvOutput", 6, false),
+            new("AudioUsbDeviceOutput", 2, true),
+            new("AudioExternalOutput", 6, true),
         };
 
         /// <summary>
@@ -86,4 +86,4 @@ namespace Ryujinx.Audio.Renderer.Device
             return Name;
         }
     }
-}
+}

src/Ryujinx.Audio/Renderer/Device/VirtualDeviceSession.cs

@@ -24,4 +24,4 @@ namespace Ryujinx.Audio.Renderer.Device
             Device = virtualDevice;
         }
     }
-}
+}

src/Ryujinx.Audio/Renderer/Device/VirtualDeviceSessionRegistry.cs

@@ -11,13 +11,15 @@ namespace Ryujinx.Audio.Renderer.Device
         /// <summary>
         /// The session registry, used to store the sessions of a given AppletResourceId.
         /// </summary>
-        private Dictionary<ulong, VirtualDeviceSession[]> _sessionsRegistry = new Dictionary<ulong, VirtualDeviceSession[]>();
+        private readonly Dictionary<ulong, VirtualDeviceSession[]> _sessionsRegistry = new();
 
         /// <summary>
         /// The default <see cref="VirtualDevice"/>.
         /// </summary>
         /// <remarks>This is used when the USB device is the default one on older revision.</remarks>
+#pragma warning disable CA1822 // Mark member as static
         public VirtualDevice DefaultDevice => VirtualDevice.Devices[0];
+#pragma warning restore CA1822
 
         /// <summary>
         /// The current active <see cref="VirtualDevice"/>.
@@ -76,4 +78,4 @@ namespace Ryujinx.Audio.Renderer.Device
             return virtualDeviceSession;
         }
     }
-}
+}

src/Ryujinx.Audio/Renderer/Dsp/AdpcmHelper.cs

@@ -12,7 +12,9 @@ namespace Ryujinx.Audio.Renderer.Dsp
         private const int SamplesPerFrame = 14;
         private const int NibblesPerFrame = SamplesPerFrame + 2;
         private const int BytesPerFrame = 8;
+#pragma warning disable IDE0051 // Remove unused private member
         private const int BitsPerFrame = BytesPerFrame * 8;
+#pragma warning restore IDE0051
 
         [MethodImpl(MethodImplOptions.AggressiveInlining)]
         public static uint GetAdpcmDataSize(int sampleCount)
@@ -64,10 +66,14 @@ namespace Ryujinx.Audio.Renderer.Dsp
         private static short Saturate(int value)
         {
             if (value > short.MaxValue)
+            {
                 value = short.MaxValue;
+            }
 
             if (value < short.MinValue)
+            {
                 value = short.MinValue;
+            }
 
             return (short)value;
         }
@@ -109,7 +115,7 @@ namespace Ryujinx.Audio.Renderer.Dsp
 
             ReadOnlySpan<byte> targetInput;
 
-            targetInput = input.Slice(nibbles / 2);
+            targetInput = input[(nibbles / 2)..];
 
             while (remaining > 0)
             {
@@ -213,4 +219,4 @@ namespace Ryujinx.Audio.Renderer.Dsp
             return decodedCount;
         }
     }
-}
+}

src/Ryujinx.Audio/Renderer/Dsp/AudioProcessor.cs

@@ -18,7 +18,7 @@ namespace Ryujinx.Audio.Renderer.Dsp
             Start,
             Stop,
             RenderStart,
-            RenderEnd
+            RenderEnd,
         }
 
         private class RendererSession
@@ -36,7 +36,7 @@ namespace Ryujinx.Audio.Renderer.Dsp
 
         private long _lastTime;
         private long _playbackEnds;
-        private ManualResetEvent _event;
+        private readonly ManualResetEvent _event;
 
         private ManualResetEvent _pauseEvent;
 
@@ -45,6 +45,7 @@ namespace Ryujinx.Audio.Renderer.Dsp
             _event = new ManualResetEvent(false);
         }
 
+#pragma warning disable IDE0051 // Remove unused private member
         private static uint GetHardwareChannelCount(IHardwareDeviceDriver deviceDriver)
         {
             // Get the real device driver (In case the compat layer is on top of it).
@@ -54,12 +55,11 @@ namespace Ryujinx.Audio.Renderer.Dsp
             {
                 return 6;
             }
-            else
-            {
-                // NOTE: We default to stereo as this will get downmixed to mono by the compat layer if it's not compatible.
-                return 2;
-            }
+
+            // NOTE: We default to stereo as this will get downmixed to mono by the compat layer if it's not compatible.
+            return 2;
         }
+#pragma warning restore IDE0051
 
         public void Start(IHardwareDeviceDriver deviceDriver, float volume)
         {
@@ -110,7 +110,7 @@ namespace Ryujinx.Audio.Renderer.Dsp
             {
                 CommandList = commands,
                 RenderingLimit = renderingLimit,
-                AppletResourceId = appletResourceId
+                AppletResourceId = appletResourceId,
             };
         }
 
@@ -171,7 +171,7 @@ namespace Ryujinx.Audio.Renderer.Dsp
         {
             _workerThread = new Thread(Work)
             {
-                Name = "AudioProcessor.Worker"
+                Name = "AudioProcessor.Worker",
             };
 
             _workerThread.Start();
@@ -260,6 +260,7 @@ namespace Ryujinx.Audio.Renderer.Dsp
 
         public void Dispose()
         {
+            GC.SuppressFinalize(this);
             Dispose(true);
         }
 
@@ -271,4 +272,4 @@ namespace Ryujinx.Audio.Renderer.Dsp
             }
         }
     }
-}
+}

src/Ryujinx.Audio/Renderer/Dsp/BiquadFilterHelper.cs

@@ -80,4 +80,4 @@ namespace Ryujinx.Audio.Renderer.Dsp
             }
         }
     }
-}
+}

src/Ryujinx.Audio/Renderer/Dsp/Command/AdpcmDataSourceCommandVersion1.cs

@@ -1,7 +1,9 @@
 using Ryujinx.Audio.Common;
 using Ryujinx.Audio.Renderer.Common;
+using Ryujinx.Audio.Renderer.Server.Voice;
 using System;
 using static Ryujinx.Audio.Renderer.Parameter.VoiceInParameter;
+using WaveBuffer = Ryujinx.Audio.Renderer.Common.WaveBuffer;
 
 namespace Ryujinx.Audio.Renderer.Dsp.Command
 {
@@ -29,7 +31,7 @@ namespace Ryujinx.Audio.Renderer.Dsp.Command
 
         public DecodingBehaviour DecodingBehaviour { get; }
 
-        public AdpcmDataSourceCommandVersion1(ref Server.Voice.VoiceState serverState, Memory<VoiceUpdateState> state, ushort outputBufferIndex, int nodeId)
+        public AdpcmDataSourceCommandVersion1(ref VoiceState serverState, Memory<VoiceUpdateState> state, ushort outputBufferIndex, int nodeId)
         {
             Enabled = true;
             NodeId = nodeId;
@@ -57,7 +59,7 @@ namespace Ryujinx.Audio.Renderer.Dsp.Command
         {
             Span<float> outputBuffer = context.GetBuffer(OutputBufferIndex);
 
-            DataSourceHelper.WaveBufferInformation info = new DataSourceHelper.WaveBufferInformation
+            DataSourceHelper.WaveBufferInformation info = new()
             {
                 SourceSampleRate = SampleRate,
                 SampleFormat = SampleFormat.Adpcm,
@@ -72,4 +74,4 @@ namespace Ryujinx.Audio.Renderer.Dsp.Command
             DataSourceHelper.ProcessWaveBuffers(context.MemoryManager, outputBuffer, ref info, WaveBuffers, ref State.Span[0], context.SampleRate, (int)context.SampleCount);
         }
     }
-}
+}

src/Ryujinx.Audio/Renderer/Dsp/Command/AuxiliaryBufferCommand.cs

@@ -155,7 +155,7 @@ namespace Ryujinx.Audio.Renderer.Dsp.Command
 
                 if (readResult != context.SampleCount)
                 {
-                    outputBuffer.Slice((int)readResult, (int)context.SampleCount - (int)readResult).Fill(0);
+                    outputBuffer[(int)readResult..(int)context.SampleCount].Clear();
                 }
             }
             else
@@ -170,4 +170,4 @@ namespace Ryujinx.Audio.Renderer.Dsp.Command
             }
         }
     }
-}
+}

src/Ryujinx.Audio/Renderer/Dsp/Command/BiquadFilterCommand.cs

@@ -48,4 +48,4 @@ namespace Ryujinx.Audio.Renderer.Dsp.Command
             BiquadFilterHelper.ProcessBiquadFilter(ref _parameter, ref state, outputBuffer, inputBuffer, context.SampleCount);
         }
     }
-}
+}

src/Ryujinx.Audio/Renderer/Dsp/Command/CaptureBufferCommand.cs

@@ -133,4 +133,4 @@ namespace Ryujinx.Audio.Renderer.Dsp.Command
             }
         }
     }
-}
+}

src/Ryujinx.Audio/Renderer/Dsp/Command/CircularBufferSinkCommand.cs

@@ -43,7 +43,7 @@ namespace Ryujinx.Audio.Renderer.Dsp.Command
 
         public void Process(CommandList context)
         {
-            const int targetChannelCount = 2;
+            const int TargetChannelCount = 2;
 
             ulong currentOffset = CurrentOffset;
 
@@ -59,10 +59,10 @@ namespace Ryujinx.Audio.Renderer.Dsp.Command
 
                         for (int y = 0; y < context.SampleCount; y++)
                         {
-                            context.MemoryManager.Write(targetOffset + (ulong)y * targetChannelCount, PcmHelper.Saturate(inputBuffer[y]));
+                            context.MemoryManager.Write(targetOffset + (ulong)y * TargetChannelCount, PcmHelper.Saturate(inputBuffer[y]));
                         }
 
-                        currentOffset += context.SampleCount * targetChannelCount;
+                        currentOffset += context.SampleCount * TargetChannelCount;
 
                         if (currentOffset >= CircularBufferSize)
                         {
@@ -73,4 +73,4 @@ namespace Ryujinx.Audio.Renderer.Dsp.Command
             }
         }
     }
-}
+}

src/Ryujinx.Audio/Renderer/Dsp/Command/ClearMixBufferCommand.cs

@@ -21,4 +21,4 @@ namespace Ryujinx.Audio.Renderer.Dsp.Command
             context.ClearBuffers();
         }
     }
-}
+}

src/Ryujinx.Audio/Renderer/Dsp/Command/CommandList.cs

@@ -71,7 +71,7 @@ namespace Ryujinx.Audio.Renderer.Dsp.Command
                 return (IntPtr)((float*)_buffersMemoryHandle.Pointer + index * _sampleCount);
             }
 
-            throw new ArgumentOutOfRangeException();
+            throw new ArgumentOutOfRangeException(nameof(index), index, null);
         }
 
         [MethodImpl(MethodImplOptions.AggressiveInlining)]
@@ -149,7 +149,8 @@ namespace Ryujinx.Audio.Renderer.Dsp.Command
 
         public void Dispose()
         {
+            GC.SuppressFinalize(this);
             _buffersMemoryHandle.Dispose();
         }
     }
-}
+}

src/Ryujinx.Audio/Renderer/Dsp/Command/CommandType.cs

@@ -32,6 +32,6 @@ namespace Ryujinx.Audio.Renderer.Dsp.Command
         LimiterVersion2,
         GroupedBiquadFilter,
         CaptureBuffer,
-        Compressor
+        Compressor,
     }
-}
+}

src/Ryujinx.Audio/Renderer/Dsp/Command/CompressorCommand.cs

@@ -1,6 +1,7 @@
 using Ryujinx.Audio.Renderer.Dsp.Effect;
 using Ryujinx.Audio.Renderer.Dsp.State;
 using Ryujinx.Audio.Renderer.Parameter.Effect;
+using Ryujinx.Audio.Renderer.Server.Effect;
 using System;
 using System.Diagnostics;
 
@@ -51,11 +52,11 @@ namespace Ryujinx.Audio.Renderer.Dsp.Command
 
             if (IsEffectEnabled)
             {
-                if (_parameter.Status == Server.Effect.UsageState.Invalid)
+                if (_parameter.Status == UsageState.Invalid)
                 {
                     state = new CompressorState(ref _parameter);
                 }
-                else if (_parameter.Status == Server.Effect.UsageState.New)
+                else if (_parameter.Status == UsageState.New)
                 {
                     state.UpdateParameter(ref _parameter);
                 }