Compare commits
4 Commits
Author | SHA1 | Date | |
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7b7f62c776 | ||
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423dbc8888 | ||
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6adf15e479 | ||
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2747f12591 |
@@ -20,7 +20,7 @@
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<PackageVersion Include="GtkSharp.Dependencies.osx" Version="0.0.5" />
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<PackageVersion Include="jp2masa.Avalonia.Flexbox" Version="0.2.0" />
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<PackageVersion Include="LibHac" Version="0.17.0" />
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<PackageVersion Include="Microsoft.CodeAnalysis.Analyzers" Version="3.3.3" />
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<PackageVersion Include="Microsoft.CodeAnalysis.Analyzers" Version="3.3.4" />
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<PackageVersion Include="Microsoft.CodeAnalysis.CSharp" Version="4.4.0" />
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<PackageVersion Include="Microsoft.NET.Test.Sdk" Version="17.4.1" />
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<PackageVersion Include="MsgPack.Cli" Version="1.0.1" />
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@@ -44,7 +44,7 @@
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<PackageVersion Include="SixLabors.ImageSharp.Drawing" Version="1.0.0-beta11" />
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<PackageVersion Include="SPB" Version="0.0.4-build28" />
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<PackageVersion Include="System.Drawing.Common" Version="7.0.0" />
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<PackageVersion Include="System.IdentityModel.Tokens.Jwt" Version="6.25.1" />
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<PackageVersion Include="System.IdentityModel.Tokens.Jwt" Version="6.26.0" />
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<PackageVersion Include="System.IO.FileSystem.Primitives" Version="4.3.0" />
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<PackageVersion Include="System.Management" Version="7.0.0" />
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<PackageVersion Include="System.Net.NameResolution" Version="4.3.0" />
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@@ -135,7 +135,7 @@ namespace Ryujinx.Graphics.GAL.Multithreading
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// The other thread can only increase the command count.
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// We can assume that if it is above 0, it will stay there or get higher.
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while (_commandCount > 0 && Volatile.Read(ref _interruptAction) == null)
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while (Volatile.Read(ref _commandCount) > 0 && Volatile.Read(ref _interruptAction) == null)
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{
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int commandPtr = _consumerPtr;
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@@ -169,7 +169,7 @@ namespace Ryujinx.Graphics.GAL.Multithreading
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internal ref T New<T>() where T : struct
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{
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while (_producerPtr == (_consumerPtr + QueueCount - 1) % QueueCount)
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while (_producerPtr == (Volatile.Read(ref _consumerPtr) + QueueCount - 1) % QueueCount)
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{
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// If incrementing the producer pointer would overflow, we need to wait.
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// _consumerPtr can only move forward, so there's no race to worry about here.
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@@ -22,7 +22,7 @@ namespace Ryujinx.Graphics.Gpu.Shader.DiskCache
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private const ushort FileFormatVersionMajor = 1;
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private const ushort FileFormatVersionMinor = 2;
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private const uint FileFormatVersionPacked = ((uint)FileFormatVersionMajor << 16) | FileFormatVersionMinor;
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private const uint CodeGenVersion = 3939;
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private const uint CodeGenVersion = 4318;
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private const string SharedTocFileName = "shared.toc";
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private const string SharedDataFileName = "shared.data";
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@@ -91,6 +91,7 @@ namespace Ryujinx.Graphics.Shader.Decoders
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Neu = 13,
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Geu = 14,
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T = 15,
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Off = 16,
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Lo = 17,
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Sff = 18,
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Ls = 19,
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@@ -54,13 +54,6 @@ namespace Ryujinx.Graphics.Shader.Instructions
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context.Config.GpuAccessor.Log("Shader instruction Cctlt is not implemented.");
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}
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public static void Cset(EmitterContext context)
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{
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InstCset op = context.GetOp<InstCset>();
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context.Config.GpuAccessor.Log("Shader instruction Cset is not implemented.");
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}
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public static void Cs2r(EmitterContext context)
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{
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InstCs2r op = context.GetOp<InstCs2r>();
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@@ -0,0 +1,87 @@
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using Ryujinx.Graphics.Shader.Decoders;
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using Ryujinx.Graphics.Shader.IntermediateRepresentation;
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using Ryujinx.Graphics.Shader.Translation;
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using static Ryujinx.Graphics.Shader.Instructions.InstEmitAluHelper;
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using static Ryujinx.Graphics.Shader.Instructions.InstEmitHelper;
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using static Ryujinx.Graphics.Shader.IntermediateRepresentation.OperandHelper;
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namespace Ryujinx.Graphics.Shader.Instructions
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{
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static partial class InstEmit
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{
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public static void Cset(EmitterContext context)
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{
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InstCset op = context.GetOp<InstCset>();
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Operand res = GetCondition(context, op.Ccc);
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Operand srcPred = GetPredicate(context, op.SrcPred, op.SrcPredInv);
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res = GetPredLogicalOp(context, op.Bop, res, srcPred);
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Operand dest = GetDest(op.Dest);
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if (op.BVal)
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{
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context.Copy(dest, context.ConditionalSelect(res, ConstF(1), Const(0)));
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}
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else
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{
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context.Copy(dest, res);
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}
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// TODO: CC.
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}
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public static void Csetp(EmitterContext context)
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{
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InstCsetp op = context.GetOp<InstCsetp>();
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Operand p0Res = GetCondition(context, op.Ccc);
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Operand p1Res = context.BitwiseNot(p0Res);
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Operand srcPred = GetPredicate(context, op.SrcPred, op.SrcPredInv);
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p0Res = GetPredLogicalOp(context, op.Bop, p0Res, srcPred);
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p1Res = GetPredLogicalOp(context, op.Bop, p1Res, srcPred);
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context.Copy(Register(op.DestPred, RegisterType.Predicate), p0Res);
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context.Copy(Register(op.DestPredInv, RegisterType.Predicate), p1Res);
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// TODO: CC.
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}
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private static Operand GetCondition(EmitterContext context, Ccc cond, int defaultCond = IrConsts.True)
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{
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return cond switch
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{
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Ccc.F => Const(IrConsts.False),
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Ccc.Lt => context.BitwiseExclusiveOr(context.BitwiseAnd(GetNF(), context.BitwiseNot(GetZF())), GetVF()),
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Ccc.Eq => context.BitwiseAnd(context.BitwiseNot(GetNF()), GetZF()),
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Ccc.Le => context.BitwiseExclusiveOr(GetNF(), context.BitwiseOr(GetZF(), GetVF())),
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Ccc.Gt => context.BitwiseNot(context.BitwiseOr(context.BitwiseExclusiveOr(GetNF(), GetVF()), GetZF())),
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Ccc.Ne => context.BitwiseNot(GetZF()),
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Ccc.Ge => context.BitwiseNot(context.BitwiseExclusiveOr(GetNF(), GetVF())),
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Ccc.Num => context.BitwiseNot(context.BitwiseAnd(GetNF(), GetZF())),
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Ccc.Nan => context.BitwiseAnd(GetNF(), GetZF()),
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Ccc.Ltu => context.BitwiseExclusiveOr(GetNF(), GetVF()),
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Ccc.Equ => GetZF(),
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Ccc.Leu => context.BitwiseOr(context.BitwiseExclusiveOr(GetNF(), GetVF()), GetZF()),
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Ccc.Gtu => context.BitwiseExclusiveOr(context.BitwiseNot(GetNF()), context.BitwiseOr(GetVF(), GetZF())),
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Ccc.Neu => context.BitwiseOr(GetNF(), context.BitwiseNot(GetZF())),
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Ccc.Geu => context.BitwiseExclusiveOr(context.BitwiseOr(context.BitwiseNot(GetNF()), GetZF()), GetVF()),
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Ccc.T => Const(IrConsts.True),
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Ccc.Off => context.BitwiseNot(GetVF()),
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Ccc.Lo => context.BitwiseNot(GetCF()),
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Ccc.Sff => context.BitwiseNot(GetNF()),
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Ccc.Ls => context.BitwiseOr(GetZF(), context.BitwiseNot(GetCF())),
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Ccc.Hi => context.BitwiseAnd(GetCF(), context.BitwiseNot(GetZF())),
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Ccc.Sft => GetNF(),
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Ccc.Hs => GetCF(),
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Ccc.Oft => GetVF(),
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Ccc.Rle => context.BitwiseOr(GetNF(), GetZF()),
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Ccc.Rgt => context.BitwiseNot(context.BitwiseOr(GetNF(), GetZF())),
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_ => Const(defaultCond)
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};
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}
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}
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}
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@@ -257,7 +257,7 @@ namespace Ryujinx.Graphics.Shader.Instructions
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}
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else
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{
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// TODO: Support CC here aswell (condition).
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// TODO: Support CC here as well (condition).
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foreach (SyncTarget target in targets.Values)
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{
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PushOpInfo pushOpInfo = target.PushOpInfo;
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@@ -318,21 +318,5 @@ namespace Ryujinx.Graphics.Shader.Instructions
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context.BranchIfTrue(label, pred);
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}
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}
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private static Operand GetCondition(EmitterContext context, Ccc cond, int defaultCond = IrConsts.True)
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{
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// TODO: More condition codes, figure out how they work.
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switch (cond)
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{
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case Ccc.Eq:
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case Ccc.Equ:
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return GetZF();
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case Ccc.Ne:
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case Ccc.Neu:
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return context.BitwiseNot(GetZF());
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}
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return Const(defaultCond);
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}
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}
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}
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@@ -11,23 +11,6 @@ namespace Ryujinx.Graphics.Shader.Instructions
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{
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static partial class InstEmit
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{
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public static void Csetp(EmitterContext context)
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{
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InstCsetp op = context.GetOp<InstCsetp>();
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// TODO: Implement that properly.
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Operand p0Res = Const(IrConsts.True);
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Operand p1Res = context.BitwiseNot(p0Res);
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Operand srcPred = GetPredicate(context, op.SrcPred, op.SrcPredInv);
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p0Res = GetPredLogicalOp(context, op.Bop, p0Res, srcPred);
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p1Res = GetPredLogicalOp(context, op.Bop, p1Res, srcPred);
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context.Copy(Register(op.DestPred, RegisterType.Predicate), p0Res);
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context.Copy(Register(op.DestPredInv, RegisterType.Predicate), p1Res);
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}
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public static void IcmpR(EmitterContext context)
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{
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InstIcmpR op = context.GetOp<InstIcmpR>();
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@@ -2,6 +2,7 @@
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<PropertyGroup>
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<TargetFramework>netstandard2.0</TargetFramework>
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<EnforceExtendedAnalyzerRules>true</EnforceExtendedAnalyzerRules>
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</PropertyGroup>
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<ItemGroup>
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@@ -2,6 +2,7 @@
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<PropertyGroup>
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<TargetFramework>netstandard2.0</TargetFramework>
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<EnforceExtendedAnalyzerRules>true</EnforceExtendedAnalyzerRules>
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</PropertyGroup>
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<ItemGroup>
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@@ -4,6 +4,7 @@
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<TargetFramework>netstandard2.0</TargetFramework>
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<Nullable>enable</Nullable>
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<LangVersion>latest</LangVersion>
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<EnforceExtendedAnalyzerRules>true</EnforceExtendedAnalyzerRules>
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</PropertyGroup>
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<ItemGroup>
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Reference in New Issue
Block a user