Compare commits
7 Commits
Author | SHA1 | Date | |
---|---|---|---|
79408b68c3 | |||
d461d4f68b | |||
b45d30acf8 | |||
df70442c46 | |||
e2ffa5a125 | |||
73feac5819 | |||
e5ad1dfa48 |
@ -130,11 +130,6 @@ namespace ARMeilleure.Instructions
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bool ordered = (accType & AccessType.Ordered) != 0;
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bool exclusive = (accType & AccessType.Exclusive) != 0;
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if (ordered)
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{
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EmitBarrier(context);
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}
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Operand address = context.Copy(GetIntOrSP(context, op.Rn));
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Operand t = GetIntOrZR(context, op.Rt);
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@ -163,6 +158,11 @@ namespace ARMeilleure.Instructions
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{
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EmitStoreExclusive(context, address, t, exclusive, op.Size, op.Rs, a32: false);
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}
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if (ordered)
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{
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EmitBarrier(context);
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}
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}
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private static void EmitBarrier(ArmEmitterContext context)
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|
@ -146,13 +146,13 @@ namespace ARMeilleure.Instructions
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var exclusive = (accType & AccessType.Exclusive) != 0;
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var ordered = (accType & AccessType.Ordered) != 0;
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if (ordered)
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{
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EmitBarrier(context);
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}
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if ((accType & AccessType.Load) != 0)
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{
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if (ordered)
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{
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EmitBarrier(context);
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}
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if (size == DWordSizeLog2)
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{
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// Keep loads atomic - make the call to get the whole region and then decompose it into parts
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@ -219,6 +219,11 @@ namespace ARMeilleure.Instructions
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Operand value = context.ZeroExtend32(OperandType.I64, GetIntA32(context, op.Rt));
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EmitStoreExclusive(context, address, value, exclusive, size, op.Rd, a32: true);
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}
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if (ordered)
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{
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EmitBarrier(context);
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}
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}
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}
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|
@ -27,7 +27,7 @@ namespace ARMeilleure.Translation.PTC
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private const string OuterHeaderMagicString = "PTCohd\0\0";
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private const string InnerHeaderMagicString = "PTCihd\0\0";
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private const uint InternalVersion = 3179; //! To be incremented manually for each change to the ARMeilleure project.
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private const uint InternalVersion = 3193; //! To be incremented manually for each change to the ARMeilleure project.
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private const string ActualDir = "0";
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private const string BackupDir = "1";
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|
@ -47,6 +47,7 @@ namespace Ryujinx.Common.Logging
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ServiceNim,
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ServiceNs,
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ServiceNsd,
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ServiceNtc,
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ServiceNv,
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ServiceOlsc,
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ServicePctl,
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|
@ -52,7 +52,7 @@ namespace Ryujinx.Graphics.GAL
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R32G32B32A32Sint,
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S8Uint,
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D16Unorm,
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D24X8Unorm,
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S8UintD24Unorm,
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D32Float,
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D24UnormS8Uint,
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D32FloatS8Uint,
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@ -266,7 +266,7 @@ namespace Ryujinx.Graphics.GAL
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{
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case Format.D16Unorm:
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case Format.D24UnormS8Uint:
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case Format.D24X8Unorm:
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case Format.S8UintD24Unorm:
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case Format.D32Float:
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case Format.D32FloatS8Uint:
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case Format.S8Uint:
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|
@ -1,7 +1,7 @@
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using Ryujinx.Common;
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using Ryujinx.Common.Logging;
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using Ryujinx.Graphics.Device;
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using Ryujinx.Graphics.Gpu.Engine.Threed;
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using Ryujinx.Graphics.Gpu.Memory;
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using Ryujinx.Graphics.Texture;
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using System;
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using System.Collections.Generic;
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@ -330,11 +330,95 @@ namespace Ryujinx.Graphics.Gpu.Engine.Dma
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{
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// TODO: Implement remap functionality.
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// Buffer to buffer copy.
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memoryManager.Physical.BufferCache.CopyBuffer(memoryManager, srcGpuVa, dstGpuVa, size);
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bool srcIsPitchKind = memoryManager.GetKind(srcGpuVa).IsPitch();
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bool dstIsPitchKind = memoryManager.GetKind(dstGpuVa).IsPitch();
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if (!srcIsPitchKind && dstIsPitchKind)
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{
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CopyGobBlockLinearToLinear(memoryManager, srcGpuVa, dstGpuVa, size);
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}
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else if (srcIsPitchKind && !dstIsPitchKind)
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{
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CopyGobLinearToBlockLinear(memoryManager, srcGpuVa, dstGpuVa, size);
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}
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else
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{
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memoryManager.Physical.BufferCache.CopyBuffer(memoryManager, srcGpuVa, dstGpuVa, size);
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}
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}
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}
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}
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/// <summary>
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/// Copies block linear data with block linear GOBs to a block linear destination with linear GOBs.
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/// </summary>
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/// <param name="memoryManager">GPU memory manager</param>
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/// <param name="srcGpuVa">Source GPU virtual address</param>
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/// <param name="dstGpuVa">Destination GPU virtual address</param>
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/// <param name="size">Size in bytes of the copy</param>
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private static void CopyGobBlockLinearToLinear(MemoryManager memoryManager, ulong srcGpuVa, ulong dstGpuVa, ulong size)
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{
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if (((srcGpuVa | dstGpuVa | size) & 0xf) == 0)
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{
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for (ulong offset = 0; offset < size; offset += 16)
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{
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Vector128<byte> data = memoryManager.Read<Vector128<byte>>(ConvertGobLinearToBlockLinearAddress(srcGpuVa + offset), true);
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memoryManager.Write(dstGpuVa + offset, data);
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}
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}
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else
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{
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for (ulong offset = 0; offset < size; offset++)
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{
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byte data = memoryManager.Read<byte>(ConvertGobLinearToBlockLinearAddress(srcGpuVa + offset), true);
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memoryManager.Write(dstGpuVa + offset, data);
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}
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}
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}
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/// <summary>
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/// Copies block linear data with linear GOBs to a block linear destination with block linear GOBs.
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/// </summary>
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/// <param name="memoryManager">GPU memory manager</param>
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/// <param name="srcGpuVa">Source GPU virtual address</param>
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/// <param name="dstGpuVa">Destination GPU virtual address</param>
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/// <param name="size">Size in bytes of the copy</param>
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private static void CopyGobLinearToBlockLinear(MemoryManager memoryManager, ulong srcGpuVa, ulong dstGpuVa, ulong size)
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{
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if (((srcGpuVa | dstGpuVa | size) & 0xf) == 0)
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{
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for (ulong offset = 0; offset < size; offset += 16)
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{
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Vector128<byte> data = memoryManager.Read<Vector128<byte>>(srcGpuVa + offset, true);
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memoryManager.Write(ConvertGobLinearToBlockLinearAddress(dstGpuVa + offset), data);
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}
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}
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else
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{
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for (ulong offset = 0; offset < size; offset++)
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{
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byte data = memoryManager.Read<byte>(srcGpuVa + offset, true);
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memoryManager.Write(ConvertGobLinearToBlockLinearAddress(dstGpuVa + offset), data);
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}
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}
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}
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/// <summary>
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/// Calculates the GOB block linear address from a linear address.
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/// </summary>
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/// <param name="address">Linear address</param>
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/// <returns>Block linear address</returns>
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private static ulong ConvertGobLinearToBlockLinearAddress(ulong address)
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{
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// y2 y1 y0 x5 x4 x3 x2 x1 x0 -> x5 y2 y1 x4 y0 x3 x2 x1 x0
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return (address & ~0x1f0UL) |
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((address & 0x40) >> 2) |
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((address & 0x10) << 1) |
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((address & 0x180) >> 1) |
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((address & 0x20) << 3);
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}
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/// <summary>
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/// Performs a buffer to buffer, or buffer to texture copy, then optionally releases a semaphore.
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/// </summary>
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|
@ -28,13 +28,13 @@ namespace Ryujinx.Graphics.Gpu.Engine.Types
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{
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return format switch
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{
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ZetaFormat.D32Float => new FormatInfo(Format.D32Float, 1, 1, 4, 1),
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ZetaFormat.D16Unorm => new FormatInfo(Format.D16Unorm, 1, 1, 2, 1),
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ZetaFormat.D24UnormS8Uint => new FormatInfo(Format.D24UnormS8Uint, 1, 1, 4, 2),
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ZetaFormat.D24Unorm => new FormatInfo(Format.D24UnormS8Uint, 1, 1, 4, 1),
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ZetaFormat.S8UintD24Unorm => new FormatInfo(Format.D24UnormS8Uint, 1, 1, 4, 2),
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ZetaFormat.S8Uint => new FormatInfo(Format.S8Uint, 1, 1, 1, 1),
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ZetaFormat.D32FloatS8Uint => new FormatInfo(Format.D32FloatS8Uint, 1, 1, 8, 2),
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ZetaFormat.D32Float => new FormatInfo(Format.D32Float, 1, 1, 4, 1),
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ZetaFormat.D16Unorm => new FormatInfo(Format.D16Unorm, 1, 1, 2, 1),
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ZetaFormat.D24UnormS8Uint => new FormatInfo(Format.D24UnormS8Uint, 1, 1, 4, 2),
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ZetaFormat.D24Unorm => new FormatInfo(Format.D24UnormS8Uint, 1, 1, 4, 1),
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ZetaFormat.S8UintD24Unorm => new FormatInfo(Format.S8UintD24Unorm, 1, 1, 4, 2),
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ZetaFormat.S8Uint => new FormatInfo(Format.S8Uint, 1, 1, 1, 1),
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ZetaFormat.D32FloatS8Uint => new FormatInfo(Format.D32FloatS8Uint, 1, 1, 8, 2),
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_ => FormatInfo.Default
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};
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}
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@ -55,6 +55,7 @@ namespace Ryujinx.Graphics.Gpu.Image
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{ 0x24a0e, new FormatInfo(Format.D24UnormS8Uint, 1, 1, 4, 2) },
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{ 0x24a29, new FormatInfo(Format.D24UnormS8Uint, 1, 1, 4, 2) },
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{ 0x48a29, new FormatInfo(Format.D24UnormS8Uint, 1, 1, 4, 2) },
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{ 0x4912b, new FormatInfo(Format.S8UintD24Unorm, 1, 1, 4, 2) },
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{ 0x25385, new FormatInfo(Format.D32FloatS8Uint, 1, 1, 8, 2) },
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{ 0x253b0, new FormatInfo(Format.D32FloatS8Uint, 1, 1, 8, 2) },
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{ 0xa4908, new FormatInfo(Format.R8G8B8A8Srgb, 1, 1, 4, 4) },
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|
@ -7,7 +7,6 @@ using Ryujinx.Graphics.Gpu.Engine.Types;
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using Ryujinx.Graphics.Gpu.Image;
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using Ryujinx.Graphics.Gpu.Memory;
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using Ryujinx.Graphics.Texture;
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using Ryujinx.Memory;
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using Ryujinx.Memory.Range;
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using System;
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using System.Collections.Generic;
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|
@ -203,7 +203,7 @@ namespace Ryujinx.Graphics.Gpu.Image
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}
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if ((lhs.FormatInfo.Format == Format.D24UnormS8Uint ||
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lhs.FormatInfo.Format == Format.D24X8Unorm) && rhs.FormatInfo.Format == Format.B8G8R8A8Unorm)
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lhs.FormatInfo.Format == Format.S8UintD24Unorm) && rhs.FormatInfo.Format == Format.B8G8R8A8Unorm)
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{
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return TextureMatchQuality.FormatAlias;
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}
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|
@ -362,7 +362,7 @@ namespace Ryujinx.Graphics.Gpu.Image
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return DepthStencilMode.Depth;
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}
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if (format == Format.D24X8Unorm || format == Format.D24UnormS8Uint)
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if (format == Format.D24UnormS8Uint)
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{
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return component == SwizzleComponent.Red
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? DepthStencilMode.Stencil
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|
@ -264,7 +264,8 @@ namespace Ryujinx.Graphics.Gpu.Memory
|
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/// <param name="pa">CPU virtual address to map into</param>
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/// <param name="va">GPU virtual address to be mapped</param>
|
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/// <param name="size">Size in bytes of the mapping</param>
|
||||
public void Map(ulong pa, ulong va, ulong size)
|
||||
/// <param name="kind">Kind of the resource located at the mapping</param>
|
||||
public void Map(ulong pa, ulong va, ulong size, PteKind kind)
|
||||
{
|
||||
lock (_pageTable)
|
||||
{
|
||||
@ -272,7 +273,7 @@ namespace Ryujinx.Graphics.Gpu.Memory
|
||||
|
||||
for (ulong offset = 0; offset < size; offset += PageSize)
|
||||
{
|
||||
SetPte(va + offset, pa + offset);
|
||||
SetPte(va + offset, PackPte(pa + offset, kind));
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -462,14 +463,37 @@ namespace Ryujinx.Graphics.Gpu.Memory
|
||||
return PteUnmapped;
|
||||
}
|
||||
|
||||
ulong baseAddress = GetPte(va);
|
||||
ulong pte = GetPte(va);
|
||||
|
||||
if (baseAddress == PteUnmapped)
|
||||
if (pte == PteUnmapped)
|
||||
{
|
||||
return PteUnmapped;
|
||||
}
|
||||
|
||||
return baseAddress + (va & PageMask);
|
||||
return UnpackPaFromPte(pte) + (va & PageMask);
|
||||
}
|
||||
|
||||
/// <summary>
|
||||
/// Gets the kind of a given memory page.
|
||||
/// This might indicate the type of resource that can be allocated on the page, and also texture tiling.
|
||||
/// </summary>
|
||||
/// <param name="va">GPU virtual address</param>
|
||||
/// <returns>Kind of the memory page</returns>
|
||||
public PteKind GetKind(ulong va)
|
||||
{
|
||||
if (!ValidateAddress(va))
|
||||
{
|
||||
return PteKind.Invalid;
|
||||
}
|
||||
|
||||
ulong pte = GetPte(va);
|
||||
|
||||
if (pte == PteUnmapped)
|
||||
{
|
||||
return PteKind.Invalid;
|
||||
}
|
||||
|
||||
return UnpackKindFromPte(pte);
|
||||
}
|
||||
|
||||
/// <summary>
|
||||
@ -512,5 +536,36 @@ namespace Ryujinx.Graphics.Gpu.Memory
|
||||
|
||||
_pageTable[l0][l1] = pte;
|
||||
}
|
||||
|
||||
/// <summary>
|
||||
/// Creates a page table entry from a physical address and kind.
|
||||
/// </summary>
|
||||
/// <param name="pa">Physical address</param>
|
||||
/// <param name="kind">Kind</param>
|
||||
/// <returns>Page table entry</returns>
|
||||
private static ulong PackPte(ulong pa, PteKind kind)
|
||||
{
|
||||
return pa | ((ulong)kind << 56);
|
||||
}
|
||||
|
||||
/// <summary>
|
||||
/// Unpacks kind from a page table entry.
|
||||
/// </summary>
|
||||
/// <param name="pte">Page table entry</param>
|
||||
/// <returns>Kind</returns>
|
||||
private static PteKind UnpackKindFromPte(ulong pte)
|
||||
{
|
||||
return (PteKind)(pte >> 56);
|
||||
}
|
||||
|
||||
/// <summary>
|
||||
/// Unpacks physical address from a page table entry.
|
||||
/// </summary>
|
||||
/// <param name="pte">Page table entry</param>
|
||||
/// <returns>Physical address</returns>
|
||||
private static ulong UnpackPaFromPte(ulong pte)
|
||||
{
|
||||
return pte & 0xffffffffffffffUL;
|
||||
}
|
||||
}
|
||||
}
|
268
Ryujinx.Graphics.Gpu/Memory/PteKind.cs
Normal file
268
Ryujinx.Graphics.Gpu/Memory/PteKind.cs
Normal file
@ -0,0 +1,268 @@
|
||||
namespace Ryujinx.Graphics.Gpu.Memory
|
||||
{
|
||||
/// <summary>
|
||||
/// Kind of the resource at the given memory mapping.
|
||||
/// </summary>
|
||||
public enum PteKind : byte
|
||||
{
|
||||
Invalid = 0xff,
|
||||
Pitch = 0x00,
|
||||
Z16 = 0x01,
|
||||
Z162C = 0x02,
|
||||
Z16MS22C = 0x03,
|
||||
Z16MS42C = 0x04,
|
||||
Z16MS82C = 0x05,
|
||||
Z16MS162C = 0x06,
|
||||
Z162Z = 0x07,
|
||||
Z16MS22Z = 0x08,
|
||||
Z16MS42Z = 0x09,
|
||||
Z16MS82Z = 0x0a,
|
||||
Z16MS162Z = 0x0b,
|
||||
Z162CZ = 0x36,
|
||||
Z16MS22CZ = 0x37,
|
||||
Z16MS42CZ = 0x38,
|
||||
Z16MS82CZ = 0x39,
|
||||
Z16MS162CZ = 0x5f,
|
||||
Z164CZ = 0x0c,
|
||||
Z16MS24CZ = 0x0d,
|
||||
Z16MS44CZ = 0x0e,
|
||||
Z16MS84CZ = 0x0f,
|
||||
Z16MS164CZ = 0x10,
|
||||
S8Z24 = 0x11,
|
||||
S8Z241Z = 0x12,
|
||||
S8Z24MS21Z = 0x13,
|
||||
S8Z24MS41Z = 0x14,
|
||||
S8Z24MS81Z = 0x15,
|
||||
S8Z24MS161Z = 0x16,
|
||||
S8Z242CZ = 0x17,
|
||||
S8Z24MS22CZ = 0x18,
|
||||
S8Z24MS42CZ = 0x19,
|
||||
S8Z24MS82CZ = 0x1a,
|
||||
S8Z24MS162CZ = 0x1b,
|
||||
S8Z242CS = 0x1c,
|
||||
S8Z24MS22CS = 0x1d,
|
||||
S8Z24MS42CS = 0x1e,
|
||||
S8Z24MS82CS = 0x1f,
|
||||
S8Z24MS162CS = 0x20,
|
||||
S8Z244CSZV = 0x21,
|
||||
S8Z24MS24CSZV = 0x22,
|
||||
S8Z24MS44CSZV = 0x23,
|
||||
S8Z24MS84CSZV = 0x24,
|
||||
S8Z24MS164CSZV = 0x25,
|
||||
V8Z24MS4VC12 = 0x26,
|
||||
V8Z24MS4VC4 = 0x27,
|
||||
V8Z24MS8VC8 = 0x28,
|
||||
V8Z24MS8VC24 = 0x29,
|
||||
V8Z24MS4VC121ZV = 0x2e,
|
||||
V8Z24MS4VC41ZV = 0x2f,
|
||||
V8Z24MS8VC81ZV = 0x30,
|
||||
V8Z24MS8VC241ZV = 0x31,
|
||||
V8Z24MS4VC122CS = 0x32,
|
||||
V8Z24MS4VC42CS = 0x33,
|
||||
V8Z24MS8VC82CS = 0x34,
|
||||
V8Z24MS8VC242CS = 0x35,
|
||||
V8Z24MS4VC122CZV = 0x3a,
|
||||
V8Z24MS4VC42CZV = 0x3b,
|
||||
V8Z24MS8VC82CZV = 0x3c,
|
||||
V8Z24MS8VC242CZV = 0x3d,
|
||||
V8Z24MS4VC122ZV = 0x3e,
|
||||
V8Z24MS4VC42ZV = 0x3f,
|
||||
V8Z24MS8VC82ZV = 0x40,
|
||||
V8Z24MS8VC242ZV = 0x41,
|
||||
V8Z24MS4VC124CSZV = 0x42,
|
||||
V8Z24MS4VC44CSZV = 0x43,
|
||||
V8Z24MS8VC84CSZV = 0x44,
|
||||
V8Z24MS8VC244CSZV = 0x45,
|
||||
Z24S8 = 0x46,
|
||||
Z24S81Z = 0x47,
|
||||
Z24S8MS21Z = 0x48,
|
||||
Z24S8MS41Z = 0x49,
|
||||
Z24S8MS81Z = 0x4a,
|
||||
Z24S8MS161Z = 0x4b,
|
||||
Z24S82CS = 0x4c,
|
||||
Z24S8MS22CS = 0x4d,
|
||||
Z24S8MS42CS = 0x4e,
|
||||
Z24S8MS82CS = 0x4f,
|
||||
Z24S8MS162CS = 0x50,
|
||||
Z24S82CZ = 0x51,
|
||||
Z24S8MS22CZ = 0x52,
|
||||
Z24S8MS42CZ = 0x53,
|
||||
Z24S8MS82CZ = 0x54,
|
||||
Z24S8MS162CZ = 0x55,
|
||||
Z24S84CSZV = 0x56,
|
||||
Z24S8MS24CSZV = 0x57,
|
||||
Z24S8MS44CSZV = 0x58,
|
||||
Z24S8MS84CSZV = 0x59,
|
||||
Z24S8MS164CSZV = 0x5a,
|
||||
Z24V8MS4VC12 = 0x5b,
|
||||
Z24V8MS4VC4 = 0x5c,
|
||||
Z24V8MS8VC8 = 0x5d,
|
||||
Z24V8MS8VC24 = 0x5e,
|
||||
YUVB8C12Y = 0x60,
|
||||
YUVB8C22Y = 0x61,
|
||||
YUVB10C12Y = 0x62,
|
||||
YUVB10C22Y = 0x6b,
|
||||
YUVB12C12Y = 0x6c,
|
||||
YUVB12C22Y = 0x6d,
|
||||
Z24V8MS4VC121ZV = 0x63,
|
||||
Z24V8MS4VC41ZV = 0x64,
|
||||
Z24V8MS8VC81ZV = 0x65,
|
||||
Z24V8MS8VC241ZV = 0x66,
|
||||
Z24V8MS4VC122CS = 0x67,
|
||||
Z24V8MS4VC42CS = 0x68,
|
||||
Z24V8MS8VC82CS = 0x69,
|
||||
Z24V8MS8VC242CS = 0x6a,
|
||||
Z24V8MS4VC122CZV = 0x6f,
|
||||
Z24V8MS4VC42CZV = 0x70,
|
||||
Z24V8MS8VC82CZV = 0x71,
|
||||
Z24V8MS8VC242CZV = 0x72,
|
||||
Z24V8MS4VC122ZV = 0x73,
|
||||
Z24V8MS4VC42ZV = 0x74,
|
||||
Z24V8MS8VC82ZV = 0x75,
|
||||
Z24V8MS8VC242ZV = 0x76,
|
||||
Z24V8MS4VC124CSZV = 0x77,
|
||||
Z24V8MS4VC44CSZV = 0x78,
|
||||
Z24V8MS8VC84CSZV = 0x79,
|
||||
Z24V8MS8VC244CSZV = 0x7a,
|
||||
ZF32 = 0x7b,
|
||||
ZF321Z = 0x7c,
|
||||
ZF32MS21Z = 0x7d,
|
||||
ZF32MS41Z = 0x7e,
|
||||
ZF32MS81Z = 0x7f,
|
||||
ZF32MS161Z = 0x80,
|
||||
ZF322CS = 0x81,
|
||||
ZF32MS22CS = 0x82,
|
||||
ZF32MS42CS = 0x83,
|
||||
ZF32MS82CS = 0x84,
|
||||
ZF32MS162CS = 0x85,
|
||||
ZF322CZ = 0x86,
|
||||
ZF32MS22CZ = 0x87,
|
||||
ZF32MS42CZ = 0x88,
|
||||
ZF32MS82CZ = 0x89,
|
||||
ZF32MS162CZ = 0x8a,
|
||||
X8Z24X16V8S8MS4VC12 = 0x8b,
|
||||
X8Z24X16V8S8MS4VC4 = 0x8c,
|
||||
X8Z24X16V8S8MS8VC8 = 0x8d,
|
||||
X8Z24X16V8S8MS8VC24 = 0x8e,
|
||||
X8Z24X16V8S8MS4VC121CS = 0x8f,
|
||||
X8Z24X16V8S8MS4VC41CS = 0x90,
|
||||
X8Z24X16V8S8MS8VC81CS = 0x91,
|
||||
X8Z24X16V8S8MS8VC241CS = 0x92,
|
||||
X8Z24X16V8S8MS4VC121ZV = 0x97,
|
||||
X8Z24X16V8S8MS4VC41ZV = 0x98,
|
||||
X8Z24X16V8S8MS8VC81ZV = 0x99,
|
||||
X8Z24X16V8S8MS8VC241ZV = 0x9a,
|
||||
X8Z24X16V8S8MS4VC121CZV = 0x9b,
|
||||
X8Z24X16V8S8MS4VC41CZV = 0x9c,
|
||||
X8Z24X16V8S8MS8VC81CZV = 0x9d,
|
||||
X8Z24X16V8S8MS8VC241CZV = 0x9e,
|
||||
X8Z24X16V8S8MS4VC122CS = 0x9f,
|
||||
X8Z24X16V8S8MS4VC42CS = 0xa0,
|
||||
X8Z24X16V8S8MS8VC82CS = 0xa1,
|
||||
X8Z24X16V8S8MS8VC242CS = 0xa2,
|
||||
X8Z24X16V8S8MS4VC122CSZV = 0xa3,
|
||||
X8Z24X16V8S8MS4VC42CSZV = 0xa4,
|
||||
X8Z24X16V8S8MS8VC82CSZV = 0xa5,
|
||||
X8Z24X16V8S8MS8VC242CSZV = 0xa6,
|
||||
ZF32X16V8S8MS4VC12 = 0xa7,
|
||||
ZF32X16V8S8MS4VC4 = 0xa8,
|
||||
ZF32X16V8S8MS8VC8 = 0xa9,
|
||||
ZF32X16V8S8MS8VC24 = 0xaa,
|
||||
ZF32X16V8S8MS4VC121CS = 0xab,
|
||||
ZF32X16V8S8MS4VC41CS = 0xac,
|
||||
ZF32X16V8S8MS8VC81CS = 0xad,
|
||||
ZF32X16V8S8MS8VC241CS = 0xae,
|
||||
ZF32X16V8S8MS4VC121ZV = 0xb3,
|
||||
ZF32X16V8S8MS4VC41ZV = 0xb4,
|
||||
ZF32X16V8S8MS8VC81ZV = 0xb5,
|
||||
ZF32X16V8S8MS8VC241ZV = 0xb6,
|
||||
ZF32X16V8S8MS4VC121CZV = 0xb7,
|
||||
ZF32X16V8S8MS4VC41CZV = 0xb8,
|
||||
ZF32X16V8S8MS8VC81CZV = 0xb9,
|
||||
ZF32X16V8S8MS8VC241CZV = 0xba,
|
||||
ZF32X16V8S8MS4VC122CS = 0xbb,
|
||||
ZF32X16V8S8MS4VC42CS = 0xbc,
|
||||
ZF32X16V8S8MS8VC82CS = 0xbd,
|
||||
ZF32X16V8S8MS8VC242CS = 0xbe,
|
||||
ZF32X16V8S8MS4VC122CSZV = 0xbf,
|
||||
ZF32X16V8S8MS4VC42CSZV = 0xc0,
|
||||
ZF32X16V8S8MS8VC82CSZV = 0xc1,
|
||||
ZF32X16V8S8MS8VC242CSZV = 0xc2,
|
||||
ZF32X24S8 = 0xc3,
|
||||
ZF32X24S81CS = 0xc4,
|
||||
ZF32X24S8MS21CS = 0xc5,
|
||||
ZF32X24S8MS41CS = 0xc6,
|
||||
ZF32X24S8MS81CS = 0xc7,
|
||||
ZF32X24S8MS161CS = 0xc8,
|
||||
ZF32X24S82CSZV = 0xce,
|
||||
ZF32X24S8MS22CSZV = 0xcf,
|
||||
ZF32X24S8MS42CSZV = 0xd0,
|
||||
ZF32X24S8MS82CSZV = 0xd1,
|
||||
ZF32X24S8MS162CSZV = 0xd2,
|
||||
ZF32X24S82CS = 0xd3,
|
||||
ZF32X24S8MS22CS = 0xd4,
|
||||
ZF32X24S8MS42CS = 0xd5,
|
||||
ZF32X24S8MS82CS = 0xd6,
|
||||
ZF32X24S8MS162CS = 0xd7,
|
||||
S8 = 0x2a,
|
||||
S82S = 0x2b,
|
||||
Generic16Bx2 = 0xfe,
|
||||
C322C = 0xd8,
|
||||
C322CBR = 0xd9,
|
||||
C322CBA = 0xda,
|
||||
C322CRA = 0xdb,
|
||||
C322BRA = 0xdc,
|
||||
C32MS22C = 0xdd,
|
||||
C32MS22CBR = 0xde,
|
||||
C32MS24CBRA = 0xcc,
|
||||
C32MS42C = 0xdf,
|
||||
C32MS42CBR = 0xe0,
|
||||
C32MS42CBA = 0xe1,
|
||||
C32MS42CRA = 0xe2,
|
||||
C32MS42BRA = 0xe3,
|
||||
C32MS44CBRA = 0x2c,
|
||||
C32MS8MS162C = 0xe4,
|
||||
C32MS8MS162CRA = 0xe5,
|
||||
C642C = 0xe6,
|
||||
C642CBR = 0xe7,
|
||||
C642CBA = 0xe8,
|
||||
C642CRA = 0xe9,
|
||||
C642BRA = 0xea,
|
||||
C64MS22C = 0xeb,
|
||||
C64MS22CBR = 0xec,
|
||||
C64MS24CBRA = 0xcd,
|
||||
C64MS42C = 0xed,
|
||||
C64MS42CBR = 0xee,
|
||||
C64MS42CBA = 0xef,
|
||||
C64MS42CRA = 0xf0,
|
||||
C64MS42BRA = 0xf1,
|
||||
C64MS44CBRA = 0x2d,
|
||||
C64MS8MS162C = 0xf2,
|
||||
C64MS8MS162CRA = 0xf3,
|
||||
C1282C = 0xf4,
|
||||
C1282CR = 0xf5,
|
||||
C128MS22C = 0xf6,
|
||||
C128MS22CR = 0xf7,
|
||||
C128MS42C = 0xf8,
|
||||
C128MS42CR = 0xf9,
|
||||
C128MS8MS162C = 0xfa,
|
||||
C128MS8MS162CR = 0xfb,
|
||||
X8C24 = 0xfc,
|
||||
PitchNoSwizzle = 0xfd,
|
||||
SmSkedMessage = 0xca,
|
||||
SmHostMessage = 0xcb
|
||||
}
|
||||
|
||||
static class PteKindExtensions
|
||||
{
|
||||
/// <summary>
|
||||
/// Checks if the kind is pitch.
|
||||
/// </summary>
|
||||
/// <param name="kind">Kind to check</param>
|
||||
/// <returns>True if pitch, false otherwise</returns>
|
||||
public static bool IsPitch(this PteKind kind)
|
||||
{
|
||||
return kind == PteKind.Pitch || kind == PteKind.PitchNoSwizzle;
|
||||
}
|
||||
}
|
||||
}
|
@ -1,13 +0,0 @@
|
||||
namespace Ryujinx.Graphics.Gpu.Memory
|
||||
{
|
||||
/// <summary>
|
||||
/// Name of a GPU resource.
|
||||
/// </summary>
|
||||
public enum ResourceName
|
||||
{
|
||||
Buffer,
|
||||
Texture,
|
||||
TexturePool,
|
||||
SamplerPool
|
||||
}
|
||||
}
|
@ -16,7 +16,7 @@ namespace Ryujinx.Graphics.Nvdec.Image
|
||||
int width = surface.Width;
|
||||
int height = surface.Height;
|
||||
int stride = surface.Stride;
|
||||
|
||||
|
||||
ReadOnlySpan<byte> luma = gmm.DeviceGetSpan(lumaOffset, GetBlockLinearSize(width, height, 1));
|
||||
|
||||
ReadLuma(surface.YPlane.AsSpan(), luma, stride, width, height);
|
||||
|
@ -6,15 +6,15 @@ namespace Ryujinx.Graphics.OpenGL
|
||||
{
|
||||
struct FormatTable
|
||||
{
|
||||
private static FormatInfo[] Table;
|
||||
private static SizedInternalFormat[] TableImage;
|
||||
private static FormatInfo[] _table;
|
||||
private static SizedInternalFormat[] _tableImage;
|
||||
|
||||
static FormatTable()
|
||||
{
|
||||
int tableSize = Enum.GetNames<Format>().Length;
|
||||
|
||||
Table = new FormatInfo[tableSize];
|
||||
TableImage = new SizedInternalFormat[tableSize];
|
||||
_table = new FormatInfo[tableSize];
|
||||
_tableImage = new SizedInternalFormat[tableSize];
|
||||
|
||||
Add(Format.R8Unorm, new FormatInfo(1, true, false, All.R8, PixelFormat.Red, PixelType.UnsignedByte));
|
||||
Add(Format.R8Snorm, new FormatInfo(1, true, false, All.R8Snorm, PixelFormat.Red, PixelType.Byte));
|
||||
@ -66,7 +66,7 @@ namespace Ryujinx.Graphics.OpenGL
|
||||
Add(Format.R32G32B32A32Sint, new FormatInfo(4, false, false, All.Rgba32i, PixelFormat.RgbaInteger, PixelType.Int));
|
||||
Add(Format.S8Uint, new FormatInfo(1, false, false, All.StencilIndex8, PixelFormat.StencilIndex, PixelType.UnsignedByte));
|
||||
Add(Format.D16Unorm, new FormatInfo(1, false, false, All.DepthComponent16, PixelFormat.DepthComponent, PixelType.UnsignedShort));
|
||||
Add(Format.D24X8Unorm, new FormatInfo(1, false, false, All.DepthComponent24, PixelFormat.DepthComponent, PixelType.UnsignedInt));
|
||||
Add(Format.S8UintD24Unorm, new FormatInfo(1, false, false, All.Depth24Stencil8, PixelFormat.DepthStencil, PixelType.UnsignedInt248));
|
||||
Add(Format.D32Float, new FormatInfo(1, false, false, All.DepthComponent32f, PixelFormat.DepthComponent, PixelType.Float));
|
||||
Add(Format.D24UnormS8Uint, new FormatInfo(1, false, false, All.Depth24Stencil8, PixelFormat.DepthStencil, PixelType.UnsignedInt248));
|
||||
Add(Format.D32FloatS8Uint, new FormatInfo(1, false, false, All.Depth32fStencil8, PixelFormat.DepthStencil, PixelType.Float32UnsignedInt248Rev));
|
||||
@ -218,22 +218,22 @@ namespace Ryujinx.Graphics.OpenGL
|
||||
|
||||
private static void Add(Format format, FormatInfo info)
|
||||
{
|
||||
Table[(int)format] = info;
|
||||
_table[(int)format] = info;
|
||||
}
|
||||
|
||||
private static void Add(Format format, SizedInternalFormat sif)
|
||||
{
|
||||
TableImage[(int)format] = sif;
|
||||
_tableImage[(int)format] = sif;
|
||||
}
|
||||
|
||||
public static FormatInfo GetFormatInfo(Format format)
|
||||
{
|
||||
return Table[(int)format];
|
||||
return _table[(int)format];
|
||||
}
|
||||
|
||||
public static SizedInternalFormat GetImageFormat(Format format)
|
||||
{
|
||||
return TableImage[(int)format];
|
||||
return _tableImage[(int)format];
|
||||
}
|
||||
}
|
||||
}
|
||||
|
@ -127,14 +127,13 @@ namespace Ryujinx.Graphics.OpenGL
|
||||
private static bool IsPackedDepthStencilFormat(Format format)
|
||||
{
|
||||
return format == Format.D24UnormS8Uint ||
|
||||
format == Format.D32FloatS8Uint;
|
||||
format == Format.D32FloatS8Uint ||
|
||||
format == Format.S8UintD24Unorm;
|
||||
}
|
||||
|
||||
private static bool IsDepthOnlyFormat(Format format)
|
||||
{
|
||||
return format == Format.D16Unorm ||
|
||||
format == Format.D24X8Unorm ||
|
||||
format == Format.D32Float;
|
||||
return format == Format.D16Unorm || format == Format.D32Float;
|
||||
}
|
||||
|
||||
public void Dispose()
|
||||
|
149
Ryujinx.Graphics.OpenGL/Image/FormatConverter.cs
Normal file
149
Ryujinx.Graphics.OpenGL/Image/FormatConverter.cs
Normal file
@ -0,0 +1,149 @@
|
||||
using System;
|
||||
using System.Numerics;
|
||||
using System.Runtime.InteropServices;
|
||||
using System.Runtime.Intrinsics;
|
||||
using System.Runtime.Intrinsics.X86;
|
||||
|
||||
namespace Ryujinx.Graphics.OpenGL.Image
|
||||
{
|
||||
static class FormatConverter
|
||||
{
|
||||
public unsafe static byte[] ConvertS8D24ToD24S8(ReadOnlySpan<byte> data)
|
||||
{
|
||||
byte[] output = new byte[data.Length];
|
||||
|
||||
int start = 0;
|
||||
|
||||
if (Avx2.IsSupported)
|
||||
{
|
||||
var mask = Vector256.Create(
|
||||
(byte)3, (byte)0, (byte)1, (byte)2,
|
||||
(byte)7, (byte)4, (byte)5, (byte)6,
|
||||
(byte)11, (byte)8, (byte)9, (byte)10,
|
||||
(byte)15, (byte)12, (byte)13, (byte)14,
|
||||
(byte)19, (byte)16, (byte)17, (byte)18,
|
||||
(byte)23, (byte)20, (byte)21, (byte)22,
|
||||
(byte)27, (byte)24, (byte)25, (byte)26,
|
||||
(byte)31, (byte)28, (byte)29, (byte)30);
|
||||
|
||||
int sizeAligned = data.Length & ~31;
|
||||
|
||||
fixed (byte* pInput = data, pOutput = output)
|
||||
{
|
||||
for (uint i = 0; i < sizeAligned; i += 32)
|
||||
{
|
||||
var dataVec = Avx.LoadVector256(pInput + i);
|
||||
|
||||
dataVec = Avx2.Shuffle(dataVec, mask);
|
||||
|
||||
Avx.Store(pOutput + i, dataVec);
|
||||
}
|
||||
}
|
||||
|
||||
start = sizeAligned;
|
||||
}
|
||||
else if (Ssse3.IsSupported)
|
||||
{
|
||||
var mask = Vector128.Create(
|
||||
(byte)3, (byte)0, (byte)1, (byte)2,
|
||||
(byte)7, (byte)4, (byte)5, (byte)6,
|
||||
(byte)11, (byte)8, (byte)9, (byte)10,
|
||||
(byte)15, (byte)12, (byte)13, (byte)14);
|
||||
|
||||
int sizeAligned = data.Length & ~15;
|
||||
|
||||
fixed (byte* pInput = data, pOutput = output)
|
||||
{
|
||||
for (uint i = 0; i < sizeAligned; i += 16)
|
||||
{
|
||||
var dataVec = Sse2.LoadVector128(pInput + i);
|
||||
|
||||
dataVec = Ssse3.Shuffle(dataVec, mask);
|
||||
|
||||
Sse2.Store(pOutput + i, dataVec);
|
||||
}
|
||||
}
|
||||
|
||||
start = sizeAligned;
|
||||
}
|
||||
|
||||
var outSpan = MemoryMarshal.Cast<byte, uint>(output);
|
||||
var dataSpan = MemoryMarshal.Cast<byte, uint>(data);
|
||||
for (int i = start / sizeof(uint); i < dataSpan.Length; i++)
|
||||
{
|
||||
outSpan[i] = BitOperations.RotateLeft(dataSpan[i], 8);
|
||||
}
|
||||
|
||||
return output;
|
||||
}
|
||||
|
||||
public unsafe static byte[] ConvertD24S8ToS8D24(ReadOnlySpan<byte> data)
|
||||
{
|
||||
byte[] output = new byte[data.Length];
|
||||
|
||||
int start = 0;
|
||||
|
||||
if (Avx2.IsSupported)
|
||||
{
|
||||
var mask = Vector256.Create(
|
||||
(byte)1, (byte)2, (byte)3, (byte)0,
|
||||
(byte)5, (byte)6, (byte)7, (byte)4,
|
||||
(byte)9, (byte)10, (byte)11, (byte)8,
|
||||
(byte)13, (byte)14, (byte)15, (byte)12,
|
||||
(byte)17, (byte)18, (byte)19, (byte)16,
|
||||
(byte)21, (byte)22, (byte)23, (byte)20,
|
||||
(byte)25, (byte)26, (byte)27, (byte)24,
|
||||
(byte)29, (byte)30, (byte)31, (byte)28);
|
||||
|
||||
int sizeAligned = data.Length & ~31;
|
||||
|
||||
fixed (byte* pInput = data, pOutput = output)
|
||||
{
|
||||
for (uint i = 0; i < sizeAligned; i += 32)
|
||||
{
|
||||
var dataVec = Avx.LoadVector256(pInput + i);
|
||||
|
||||
dataVec = Avx2.Shuffle(dataVec, mask);
|
||||
|
||||
Avx.Store(pOutput + i, dataVec);
|
||||
}
|
||||
}
|
||||
|
||||
start = sizeAligned;
|
||||
}
|
||||
else if (Ssse3.IsSupported)
|
||||
{
|
||||
var mask = Vector128.Create(
|
||||
(byte)1, (byte)2, (byte)3, (byte)0,
|
||||
(byte)5, (byte)6, (byte)7, (byte)4,
|
||||
(byte)9, (byte)10, (byte)11, (byte)8,
|
||||
(byte)13, (byte)14, (byte)15, (byte)12);
|
||||
|
||||
int sizeAligned = data.Length & ~15;
|
||||
|
||||
fixed (byte* pInput = data, pOutput = output)
|
||||
{
|
||||
for (uint i = 0; i < sizeAligned; i += 16)
|
||||
{
|
||||
var dataVec = Sse2.LoadVector128(pInput + i);
|
||||
|
||||
dataVec = Ssse3.Shuffle(dataVec, mask);
|
||||
|
||||
Sse2.Store(pOutput + i, dataVec);
|
||||
}
|
||||
}
|
||||
|
||||
start = sizeAligned;
|
||||
}
|
||||
|
||||
var outSpan = MemoryMarshal.Cast<byte, uint>(output);
|
||||
var dataSpan = MemoryMarshal.Cast<byte, uint>(data);
|
||||
for (int i = start / sizeof(uint); i < dataSpan.Length; i++)
|
||||
{
|
||||
outSpan[i] = BitOperations.RotateRight(dataSpan[i], 8);
|
||||
}
|
||||
|
||||
return output;
|
||||
}
|
||||
}
|
||||
}
|
@ -291,7 +291,7 @@ namespace Ryujinx.Graphics.OpenGL.Image
|
||||
|
||||
private static ClearBufferMask GetMask(Format format)
|
||||
{
|
||||
if (format == Format.D24UnormS8Uint || format == Format.D32FloatS8Uint)
|
||||
if (format == Format.D24UnormS8Uint || format == Format.D32FloatS8Uint || format == Format.S8UintD24Unorm)
|
||||
{
|
||||
return ClearBufferMask.DepthBufferBit | ClearBufferMask.StencilBufferBit;
|
||||
}
|
||||
@ -311,9 +311,7 @@ namespace Ryujinx.Graphics.OpenGL.Image
|
||||
|
||||
private static bool IsDepthOnly(Format format)
|
||||
{
|
||||
return format == Format.D16Unorm ||
|
||||
format == Format.D24X8Unorm ||
|
||||
format == Format.D32Float;
|
||||
return format == Format.D16Unorm || format == Format.D32Float;
|
||||
}
|
||||
|
||||
public TextureView BgraSwap(TextureView from)
|
||||
|
@ -140,9 +140,11 @@ namespace Ryujinx.Graphics.OpenGL.Image
|
||||
size += Info.GetMipSize(level);
|
||||
}
|
||||
|
||||
ReadOnlySpan<byte> data;
|
||||
|
||||
if (HwCapabilities.UsePersistentBufferForFlush)
|
||||
{
|
||||
return _renderer.PersistentBuffers.Default.GetTextureData(this, size);
|
||||
data = _renderer.PersistentBuffers.Default.GetTextureData(this, size);
|
||||
}
|
||||
else
|
||||
{
|
||||
@ -150,8 +152,15 @@ namespace Ryujinx.Graphics.OpenGL.Image
|
||||
|
||||
WriteTo(target);
|
||||
|
||||
return new ReadOnlySpan<byte>(target.ToPointer(), size);
|
||||
data = new ReadOnlySpan<byte>(target.ToPointer(), size);
|
||||
}
|
||||
|
||||
if (Format == Format.S8UintD24Unorm)
|
||||
{
|
||||
data = FormatConverter.ConvertD24S8ToS8D24(data);
|
||||
}
|
||||
|
||||
return data;
|
||||
}
|
||||
|
||||
public unsafe ReadOnlySpan<byte> GetData(int layer, int level)
|
||||
@ -285,6 +294,11 @@ namespace Ryujinx.Graphics.OpenGL.Image
|
||||
|
||||
public void SetData(ReadOnlySpan<byte> data)
|
||||
{
|
||||
if (Format == Format.S8UintD24Unorm)
|
||||
{
|
||||
data = FormatConverter.ConvertS8D24ToD24S8(data);
|
||||
}
|
||||
|
||||
unsafe
|
||||
{
|
||||
fixed (byte* ptr = data)
|
||||
@ -296,6 +310,11 @@ namespace Ryujinx.Graphics.OpenGL.Image
|
||||
|
||||
public void SetData(ReadOnlySpan<byte> data, int layer, int level)
|
||||
{
|
||||
if (Format == Format.S8UintD24Unorm)
|
||||
{
|
||||
data = FormatConverter.ConvertS8D24ToD24S8(data);
|
||||
}
|
||||
|
||||
unsafe
|
||||
{
|
||||
fixed (byte* ptr = data)
|
||||
|
@ -1478,6 +1478,11 @@ namespace Ryujinx.Graphics.OpenGL
|
||||
_currentComponentMasks |= componentMaskAtIndex;
|
||||
}
|
||||
|
||||
public void RestoreClipControl()
|
||||
{
|
||||
GL.ClipControl(_clipOrigin, _clipDepthMode);
|
||||
}
|
||||
|
||||
public void RestoreScissor0Enable()
|
||||
{
|
||||
if ((_scissorEnables & 1u) != 0)
|
||||
@ -1494,6 +1499,11 @@ namespace Ryujinx.Graphics.OpenGL
|
||||
}
|
||||
}
|
||||
|
||||
public void RestoreViewport0()
|
||||
{
|
||||
GL.ViewportArray(0, 1, _viewportArray);
|
||||
}
|
||||
|
||||
public bool TryHostConditionalRendering(ICounterEvent value, ulong compare, bool isEqual)
|
||||
{
|
||||
if (value is CounterQueueEvent)
|
||||
|
@ -27,11 +27,12 @@ namespace Ryujinx.Graphics.OpenGL
|
||||
{
|
||||
GL.Disable(EnableCap.FramebufferSrgb);
|
||||
|
||||
CopyTextureToFrameBufferRGB(0, GetCopyFramebufferHandleLazy(), (TextureView)texture, crop);
|
||||
CopyTextureToFrameBufferRGB(0, GetCopyFramebufferHandleLazy(), (TextureView)texture, crop, swapBuffersCallback);
|
||||
|
||||
GL.Enable(EnableCap.FramebufferSrgb);
|
||||
|
||||
swapBuffersCallback();
|
||||
// Restore unpack alignment to 4, as performance overlays such as RTSS may change this to load their resources.
|
||||
GL.PixelStore(PixelStoreParameter.UnpackAlignment, 4);
|
||||
}
|
||||
|
||||
public void SetSize(int width, int height)
|
||||
@ -40,7 +41,7 @@ namespace Ryujinx.Graphics.OpenGL
|
||||
_height = height;
|
||||
}
|
||||
|
||||
private void CopyTextureToFrameBufferRGB(int drawFramebuffer, int readFramebuffer, TextureView view, ImageCrop crop)
|
||||
private void CopyTextureToFrameBufferRGB(int drawFramebuffer, int readFramebuffer, TextureView view, ImageCrop crop, Action swapBuffersCallback)
|
||||
{
|
||||
(int oldDrawFramebufferHandle, int oldReadFramebufferHandle) = ((Pipeline)_renderer.Pipeline).GetBoundFramebuffers();
|
||||
|
||||
@ -139,11 +140,20 @@ namespace Ryujinx.Graphics.OpenGL
|
||||
((Pipeline)_renderer.Pipeline).RestoreComponentMask(i);
|
||||
}
|
||||
|
||||
// Set clip control, viewport and the framebuffer to the output to placate overlays and OBS capture.
|
||||
GL.ClipControl(ClipOrigin.LowerLeft, ClipDepthMode.NegativeOneToOne);
|
||||
GL.Viewport(0, 0, _width, _height);
|
||||
GL.BindFramebuffer(FramebufferTarget.Framebuffer, drawFramebuffer);
|
||||
|
||||
swapBuffersCallback();
|
||||
|
||||
GL.BindFramebuffer(FramebufferTarget.ReadFramebuffer, oldReadFramebufferHandle);
|
||||
GL.BindFramebuffer(FramebufferTarget.DrawFramebuffer, oldDrawFramebufferHandle);
|
||||
|
||||
((Pipeline)_renderer.Pipeline).RestoreClipControl();
|
||||
((Pipeline)_renderer.Pipeline).RestoreScissor0Enable();
|
||||
((Pipeline)_renderer.Pipeline).RestoreRasterizerDiscard();
|
||||
((Pipeline)_renderer.Pipeline).RestoreViewport0();
|
||||
|
||||
if (viewConverted != view)
|
||||
{
|
||||
|
@ -14,6 +14,9 @@ namespace Ryujinx.HLE.HOS.Services.Nifm.StaticService
|
||||
{
|
||||
private GeneralServiceDetail _generalServiceDetail;
|
||||
|
||||
private IPInterfaceProperties _targetPropertiesCache = null;
|
||||
private UnicastIPAddressInformation _targetAddressInfoCache = null;
|
||||
|
||||
public IGeneralService()
|
||||
{
|
||||
_generalServiceDetail = new GeneralServiceDetail
|
||||
@ -22,6 +25,8 @@ namespace Ryujinx.HLE.HOS.Services.Nifm.StaticService
|
||||
IsAnyInternetRequestAccepted = true // NOTE: Why not accept any internet request?
|
||||
};
|
||||
|
||||
NetworkChange.NetworkAddressChanged += new NetworkAddressChangedEventHandler(LocalInterfaceCacheHandler);
|
||||
|
||||
GeneralServiceManager.Add(_generalServiceDetail);
|
||||
}
|
||||
|
||||
@ -165,6 +170,11 @@ namespace Ryujinx.HLE.HOS.Services.Nifm.StaticService
|
||||
return (null, null);
|
||||
}
|
||||
|
||||
if (_targetPropertiesCache != null && _targetAddressInfoCache != null)
|
||||
{
|
||||
return (_targetPropertiesCache, _targetAddressInfoCache);
|
||||
}
|
||||
|
||||
IPInterfaceProperties targetProperties = null;
|
||||
UnicastIPAddressInformation targetAddressInfo = null;
|
||||
|
||||
@ -194,13 +204,26 @@ namespace Ryujinx.HLE.HOS.Services.Nifm.StaticService
|
||||
}
|
||||
}
|
||||
|
||||
_targetPropertiesCache = targetProperties;
|
||||
_targetAddressInfoCache = targetAddressInfo;
|
||||
|
||||
return (targetProperties, targetAddressInfo);
|
||||
}
|
||||
|
||||
private void LocalInterfaceCacheHandler(object sender, EventArgs e)
|
||||
{
|
||||
Logger.Info?.Print(LogClass.ServiceNifm, $"NetworkAddress changed, invalidating cached data.");
|
||||
|
||||
_targetPropertiesCache = null;
|
||||
_targetAddressInfoCache = null;
|
||||
}
|
||||
|
||||
protected override void Dispose(bool isDisposing)
|
||||
{
|
||||
if (isDisposing)
|
||||
{
|
||||
NetworkChange.NetworkAddressChanged -= LocalInterfaceCacheHandler;
|
||||
|
||||
GeneralServiceManager.Remove(_generalServiceDetail.ClientId);
|
||||
}
|
||||
}
|
||||
|
@ -1,8 +1,24 @@
|
||||
namespace Ryujinx.HLE.HOS.Services.Nim.Ntc
|
||||
using Ryujinx.Common.Logging;
|
||||
using Ryujinx.HLE.HOS.Services.Nim.Ntc.StaticService;
|
||||
|
||||
namespace Ryujinx.HLE.HOS.Services.Nim.Ntc
|
||||
{
|
||||
[Service("ntc")]
|
||||
class IStaticService : IpcService
|
||||
{
|
||||
public IStaticService(ServiceCtx context) { }
|
||||
|
||||
[CommandHipc(0)]
|
||||
// OpenEnsureNetworkClockAvailabilityService(u64) -> object<nn::ntc::detail::service::IEnsureNetworkClockAvailabilityService>
|
||||
public ResultCode CreateAsyncInterface(ServiceCtx context)
|
||||
{
|
||||
ulong unknown = context.RequestData.ReadUInt64();
|
||||
|
||||
MakeObject(context, new IEnsureNetworkClockAvailabilityService(context));
|
||||
|
||||
Logger.Stub?.PrintStub(LogClass.ServiceNtc, new { unknown });
|
||||
|
||||
return ResultCode.Success;
|
||||
}
|
||||
}
|
||||
}
|
@ -0,0 +1,77 @@
|
||||
using Ryujinx.Common.Logging;
|
||||
using Ryujinx.HLE.HOS.Ipc;
|
||||
using Ryujinx.HLE.HOS.Kernel.Common;
|
||||
using Ryujinx.HLE.HOS.Kernel.Threading;
|
||||
using System;
|
||||
|
||||
namespace Ryujinx.HLE.HOS.Services.Nim.Ntc.StaticService
|
||||
{
|
||||
class IEnsureNetworkClockAvailabilityService : IpcService
|
||||
{
|
||||
private KEvent _finishNotificationEvent;
|
||||
private ResultCode _taskResultCode;
|
||||
|
||||
public IEnsureNetworkClockAvailabilityService(ServiceCtx context)
|
||||
{
|
||||
_finishNotificationEvent = new KEvent(context.Device.System.KernelContext);
|
||||
_taskResultCode = ResultCode.Success;
|
||||
|
||||
// NOTE: The service starts a thread that polls Nintendo NTP server and syncs the time with it.
|
||||
// Additionnally it gets and uses some settings too:
|
||||
// autonomic_correction_interval_seconds, autonomic_correction_failed_retry_interval_seconds,
|
||||
// autonomic_correction_immediate_try_count_max, autonomic_correction_immediate_try_interval_milliseconds
|
||||
}
|
||||
|
||||
[CommandHipc(0)]
|
||||
// StartTask()
|
||||
public ResultCode StartTask(ServiceCtx context)
|
||||
{
|
||||
if (!context.Device.Configuration.EnableInternetAccess)
|
||||
{
|
||||
return (ResultCode)Time.ResultCode.NetworkTimeNotAvailable;
|
||||
}
|
||||
|
||||
// NOTE: Since we don't support the Nintendo NTP server, we can signal the event now to confirm the update task is done.
|
||||
_finishNotificationEvent.ReadableEvent.Signal();
|
||||
|
||||
Logger.Stub?.PrintStub(LogClass.ServiceNtc);
|
||||
|
||||
return ResultCode.Success;
|
||||
}
|
||||
|
||||
[CommandHipc(1)]
|
||||
// GetFinishNotificationEvent() -> handle<copy>
|
||||
public ResultCode GetFinishNotificationEvent(ServiceCtx context)
|
||||
{
|
||||
if (context.Process.HandleTable.GenerateHandle(_finishNotificationEvent.ReadableEvent, out int finishNotificationEventHandle) != KernelResult.Success)
|
||||
{
|
||||
throw new InvalidOperationException("Out of handles!");
|
||||
}
|
||||
|
||||
context.Response.HandleDesc = IpcHandleDesc.MakeCopy(finishNotificationEventHandle);
|
||||
|
||||
return ResultCode.Success;
|
||||
}
|
||||
|
||||
[CommandHipc(2)]
|
||||
// GetResult()
|
||||
public ResultCode GetResult(ServiceCtx context)
|
||||
{
|
||||
return _taskResultCode;
|
||||
}
|
||||
|
||||
[CommandHipc(3)]
|
||||
// Cancel()
|
||||
public ResultCode Cancel(ServiceCtx context)
|
||||
{
|
||||
// NOTE: The update task should be canceled here.
|
||||
_finishNotificationEvent.ReadableEvent.Signal();
|
||||
|
||||
_taskResultCode = (ResultCode)Time.ResultCode.NetworkTimeTaskCanceled;
|
||||
|
||||
Logger.Stub?.PrintStub(LogClass.ServiceNtc);
|
||||
|
||||
return ResultCode.Success;
|
||||
}
|
||||
}
|
||||
}
|
@ -232,7 +232,7 @@ namespace Ryujinx.HLE.HOS.Services.Nv.NvDrvServices.NvHostAsGpu
|
||||
ulong virtualAddress = arguments.Offset + arguments.BufferOffset;
|
||||
|
||||
physicalAddress += arguments.BufferOffset;
|
||||
_asContext.Gmm.Map(physicalAddress, virtualAddress, arguments.MappingSize);
|
||||
_asContext.Gmm.Map(physicalAddress, virtualAddress, arguments.MappingSize, (PteKind)arguments.Kind);
|
||||
|
||||
return NvInternalResult.Success;
|
||||
}
|
||||
@ -282,7 +282,7 @@ namespace Ryujinx.HLE.HOS.Services.Nv.NvDrvServices.NvHostAsGpu
|
||||
{
|
||||
if (_asContext.ValidateFixedBuffer(arguments.Offset, size, pageSize))
|
||||
{
|
||||
_asContext.Gmm.Map(physicalAddress, arguments.Offset, size);
|
||||
_asContext.Gmm.Map(physicalAddress, arguments.Offset, size, (PteKind)arguments.Kind);
|
||||
}
|
||||
else
|
||||
{
|
||||
@ -301,7 +301,7 @@ namespace Ryujinx.HLE.HOS.Services.Nv.NvDrvServices.NvHostAsGpu
|
||||
_memoryAllocator.AllocateRange(va, size, freeAddressStartPosition);
|
||||
}
|
||||
|
||||
_asContext.Gmm.Map(physicalAddress, va, size);
|
||||
_asContext.Gmm.Map(physicalAddress, va, size, (PteKind)arguments.Kind);
|
||||
arguments.Offset = va;
|
||||
}
|
||||
|
||||
@ -366,26 +366,30 @@ namespace Ryujinx.HLE.HOS.Services.Nv.NvDrvServices.NvHostAsGpu
|
||||
|
||||
for (int index = 0; index < arguments.Length; index++)
|
||||
{
|
||||
ulong mapOffs = (ulong)arguments[index].MapOffset << 16;
|
||||
ulong gpuVa = (ulong)arguments[index].GpuOffset << 16;
|
||||
ulong size = (ulong)arguments[index].Pages << 16;
|
||||
ref RemapArguments argument = ref arguments[index];
|
||||
ulong gpuVa = (ulong)argument.GpuOffset << 16;
|
||||
ulong size = (ulong)argument.Pages << 16;
|
||||
int nvmapHandle = argument.NvMapHandle;
|
||||
|
||||
if (arguments[index].NvMapHandle == 0)
|
||||
if (nvmapHandle == 0)
|
||||
{
|
||||
gmm.Unmap(gpuVa, size);
|
||||
}
|
||||
else
|
||||
{
|
||||
NvMapHandle map = NvMapDeviceFile.GetMapFromHandle(Owner, arguments[index].NvMapHandle);
|
||||
ulong mapOffs = (ulong)argument.MapOffset << 16;
|
||||
PteKind kind = (PteKind)argument.Kind;
|
||||
|
||||
NvMapHandle map = NvMapDeviceFile.GetMapFromHandle(Owner, nvmapHandle);
|
||||
|
||||
if (map == null)
|
||||
{
|
||||
Logger.Warning?.Print(LogClass.ServiceNv, $"Invalid NvMap handle 0x{arguments[index].NvMapHandle:x8}!");
|
||||
Logger.Warning?.Print(LogClass.ServiceNv, $"Invalid NvMap handle 0x{nvmapHandle:x8}!");
|
||||
|
||||
return NvInternalResult.InvalidInput;
|
||||
}
|
||||
|
||||
gmm.Map(mapOffs + map.Address, gpuVa, size);
|
||||
gmm.Map(mapOffs + map.Address, gpuVa, size, kind);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -251,7 +251,7 @@ namespace Ryujinx.HLE.HOS.Services.Nv.NvDrvServices.NvHostChannel
|
||||
if (va != NvMemoryAllocator.PteUnmapped && va <= uint.MaxValue && (va + (uint)map.Size) <= uint.MaxValue)
|
||||
{
|
||||
_host1xContext.MemoryAllocator.AllocateRange(va, (uint)map.Size, freeAddressStartPosition);
|
||||
_host1xContext.Smmu.Map(map.Address, va, (uint)map.Size);
|
||||
_host1xContext.Smmu.Map(map.Address, va, (uint)map.Size, PteKind.Pitch); // FIXME: This should not use the GMMU.
|
||||
map.DmaMapAddress = va;
|
||||
}
|
||||
else
|
||||
|
@ -45,7 +45,7 @@ namespace Ryujinx.HLE.HOS.Services.Olsc
|
||||
return ResultCode.NullArgument;
|
||||
}
|
||||
|
||||
if (_saveDataBackupSettingDatabase[userId])
|
||||
if (_saveDataBackupSettingDatabase.TryGetValue(userId, out bool enabled) && enabled)
|
||||
{
|
||||
context.ResponseData.Write((byte)1); // TODO: Determine value.
|
||||
}
|
||||
|
@ -7,16 +7,18 @@
|
||||
|
||||
Success = 0,
|
||||
|
||||
TimeServiceNotInitialized = (0 << ErrorCodeShift) | ModuleId,
|
||||
PermissionDenied = (1 << ErrorCodeShift) | ModuleId,
|
||||
TimeMismatch = (102 << ErrorCodeShift) | ModuleId,
|
||||
UninitializedClock = (103 << ErrorCodeShift) | ModuleId,
|
||||
TimeNotFound = (200 << ErrorCodeShift) | ModuleId,
|
||||
Overflow = (201 << ErrorCodeShift) | ModuleId,
|
||||
LocationNameTooLong = (801 << ErrorCodeShift) | ModuleId,
|
||||
OutOfRange = (902 << ErrorCodeShift) | ModuleId,
|
||||
TimeZoneConversionFailed = (903 << ErrorCodeShift) | ModuleId,
|
||||
TimeZoneNotFound = (989 << ErrorCodeShift) | ModuleId,
|
||||
NotImplemented = (990 << ErrorCodeShift) | ModuleId,
|
||||
TimeServiceNotInitialized = (0 << ErrorCodeShift) | ModuleId,
|
||||
PermissionDenied = (1 << ErrorCodeShift) | ModuleId,
|
||||
TimeMismatch = (102 << ErrorCodeShift) | ModuleId,
|
||||
UninitializedClock = (103 << ErrorCodeShift) | ModuleId,
|
||||
TimeNotFound = (200 << ErrorCodeShift) | ModuleId,
|
||||
Overflow = (201 << ErrorCodeShift) | ModuleId,
|
||||
LocationNameTooLong = (801 << ErrorCodeShift) | ModuleId,
|
||||
OutOfRange = (902 << ErrorCodeShift) | ModuleId,
|
||||
TimeZoneConversionFailed = (903 << ErrorCodeShift) | ModuleId,
|
||||
TimeZoneNotFound = (989 << ErrorCodeShift) | ModuleId,
|
||||
NotImplemented = (990 << ErrorCodeShift) | ModuleId,
|
||||
NetworkTimeNotAvailable = (1000 << ErrorCodeShift) | ModuleId,
|
||||
NetworkTimeTaskCanceled = (1003 << ErrorCodeShift) | ModuleId,
|
||||
}
|
||||
}
|
||||
|
Reference in New Issue
Block a user