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4 Commits
Author | SHA1 | Date | |
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0c3421973c | |||
0afa8f2c14 | |||
d25a084858 | |||
311ca3c3f1 |
@ -251,7 +251,20 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
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}
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}
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}
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}
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int selectedReg = GetHighestValueIndex(freePositions);
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// If this is a copy destination variable, we prefer the register used for the copy source.
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// If the register is available, then the copy can be eliminated later as both source
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// and destination will use the same register.
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int selectedReg;
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if (current.TryGetCopySourceRegister(out int preferredReg) && freePositions[preferredReg] >= current.GetEnd())
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{
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selectedReg = preferredReg;
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}
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else
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{
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selectedReg = GetHighestValueIndex(freePositions);
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}
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int selectedNextUse = freePositions[selectedReg];
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int selectedNextUse = freePositions[selectedReg];
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// Intervals starts and ends at odd positions, unless they span an entire
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// Intervals starts and ends at odd positions, unless they span an entire
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@ -431,7 +444,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
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}
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}
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}
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}
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private static int GetHighestValueIndex(Span<int> span)
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private static int GetHighestValueIndex(ReadOnlySpan<int> span)
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{
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{
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int highest = int.MinValue;
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int highest = int.MinValue;
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@ -798,12 +811,12 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
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// The "visited" state is stored in the MSB of the local's value.
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// The "visited" state is stored in the MSB of the local's value.
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const ulong VisitedMask = 1ul << 63;
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const ulong VisitedMask = 1ul << 63;
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bool IsVisited(Operand local)
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static bool IsVisited(Operand local)
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{
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{
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return (local.GetValueUnsafe() & VisitedMask) != 0;
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return (local.GetValueUnsafe() & VisitedMask) != 0;
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}
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}
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void SetVisited(Operand local)
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static void SetVisited(Operand local)
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{
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{
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local.GetValueUnsafe() |= VisitedMask;
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local.GetValueUnsafe() |= VisitedMask;
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}
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}
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@ -826,9 +839,25 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
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{
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{
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dest.NumberLocal(_intervals.Count);
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dest.NumberLocal(_intervals.Count);
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_intervals.Add(new LiveInterval(dest));
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LiveInterval interval = new LiveInterval(dest);
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_intervals.Add(interval);
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SetVisited(dest);
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SetVisited(dest);
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// If this is a copy (or copy-like operation), set the copy source interval as well.
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// This is used for register preferencing later on, which allows the copy to be eliminated
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// in some cases.
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if (node.Instruction == Instruction.Copy || node.Instruction == Instruction.ZeroExtend32)
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{
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Operand source = node.GetSource(0);
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if (source.Kind == OperandKind.LocalVariable &&
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source.GetLocalNumber() > 0 &&
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(node.Instruction == Instruction.Copy || source.Type == OperandType.I32))
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{
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interval.SetCopySource(_intervals[source.GetLocalNumber()]);
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}
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}
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}
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}
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}
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}
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}
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}
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@ -19,6 +19,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
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public LiveRange CurrRange;
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public LiveRange CurrRange;
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public LiveInterval Parent;
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public LiveInterval Parent;
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public LiveInterval CopySource;
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public UseList Uses;
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public UseList Uses;
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public LiveIntervalList Children;
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public LiveIntervalList Children;
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@ -37,6 +38,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
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private ref LiveRange CurrRange => ref _data->CurrRange;
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private ref LiveRange CurrRange => ref _data->CurrRange;
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private ref LiveRange PrevRange => ref _data->PrevRange;
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private ref LiveRange PrevRange => ref _data->PrevRange;
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private ref LiveInterval Parent => ref _data->Parent;
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private ref LiveInterval Parent => ref _data->Parent;
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private ref LiveInterval CopySource => ref _data->CopySource;
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private ref UseList Uses => ref _data->Uses;
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private ref UseList Uses => ref _data->Uses;
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private ref LiveIntervalList Children => ref _data->Children;
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private ref LiveIntervalList Children => ref _data->Children;
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@ -78,6 +80,25 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
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Register = register;
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Register = register;
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}
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}
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public void SetCopySource(LiveInterval copySource)
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{
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CopySource = copySource;
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}
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public bool TryGetCopySourceRegister(out int copySourceRegIndex)
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{
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if (CopySource._data != null)
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{
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copySourceRegIndex = CopySource.Register.Index;
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return true;
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}
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copySourceRegIndex = 0;
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return false;
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}
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public void Reset()
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public void Reset()
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{
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{
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PrevRange = default;
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PrevRange = default;
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@ -11,7 +11,7 @@ namespace ARMeilleure.Translation
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private int[] _postOrderMap;
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private int[] _postOrderMap;
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public int LocalsCount { get; private set; }
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public int LocalsCount { get; private set; }
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public BasicBlock Entry { get; }
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public BasicBlock Entry { get; private set; }
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public IntrusiveList<BasicBlock> Blocks { get; }
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public IntrusiveList<BasicBlock> Blocks { get; }
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public BasicBlock[] PostOrderBlocks => _postOrderBlocks;
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public BasicBlock[] PostOrderBlocks => _postOrderBlocks;
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public int[] PostOrderMap => _postOrderMap;
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public int[] PostOrderMap => _postOrderMap;
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@ -34,6 +34,15 @@ namespace ARMeilleure.Translation
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return result;
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return result;
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}
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}
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public void UpdateEntry(BasicBlock newEntry)
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{
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newEntry.AddSuccessor(Entry);
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Entry = newEntry;
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Blocks.AddFirst(newEntry);
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Update();
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}
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public void Update()
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public void Update()
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{
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{
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RemoveUnreachableBlocks(Blocks);
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RemoveUnreachableBlocks(Blocks);
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@ -29,7 +29,7 @@ namespace ARMeilleure.Translation.PTC
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private const string OuterHeaderMagicString = "PTCohd\0\0";
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private const string OuterHeaderMagicString = "PTCohd\0\0";
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private const string InnerHeaderMagicString = "PTCihd\0\0";
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private const string InnerHeaderMagicString = "PTCihd\0\0";
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private const uint InternalVersion = 6634; //! To be incremented manually for each change to the ARMeilleure project.
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private const uint InternalVersion = 6950; //! To be incremented manually for each change to the ARMeilleure project.
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private const string ActualDir = "0";
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private const string ActualDir = "0";
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private const string BackupDir = "1";
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private const string BackupDir = "1";
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@ -89,6 +89,17 @@ namespace ARMeilleure.Translation
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public static void RunPass(ControlFlowGraph cfg, ExecutionMode mode)
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public static void RunPass(ControlFlowGraph cfg, ExecutionMode mode)
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{
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{
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if (cfg.Entry.Predecessors.Count != 0)
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{
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// We expect the entry block to have no predecessors.
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// This is required because we have a implicit context load at the start of the function,
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// but if there is a jump to the start of the function, the context load would trash the modified values.
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// Here we insert a new entry block that will jump to the existing entry block.
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BasicBlock newEntry = new BasicBlock(cfg.Blocks.Count);
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cfg.UpdateEntry(newEntry);
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}
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// Compute local register inputs and outputs used inside blocks.
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// Compute local register inputs and outputs used inside blocks.
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RegisterMask[] localInputs = new RegisterMask[cfg.Blocks.Count];
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RegisterMask[] localInputs = new RegisterMask[cfg.Blocks.Count];
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RegisterMask[] localOutputs = new RegisterMask[cfg.Blocks.Count];
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RegisterMask[] localOutputs = new RegisterMask[cfg.Blocks.Count];
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@ -201,7 +212,7 @@ namespace ARMeilleure.Translation
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// The only block without any predecessor should be the entry block.
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// The only block without any predecessor should be the entry block.
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// It always needs a context load as it is the first block to run.
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// It always needs a context load as it is the first block to run.
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if (block.Predecessors.Count == 0 || hasContextLoad)
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if (block == cfg.Entry || hasContextLoad)
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{
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{
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long vecMask = globalInputs[block.Index].VecMask;
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long vecMask = globalInputs[block.Index].VecMask;
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long intMask = globalInputs[block.Index].IntMask;
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long intMask = globalInputs[block.Index].IntMask;
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@ -124,7 +124,7 @@ namespace Ryujinx.Common.Memory
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if (array is not null)
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if (array is not null)
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{
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{
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ArrayPool<T>.Shared.Return(array);
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ArrayPool<T>.Shared.Return(array, RuntimeHelpers.IsReferenceOrContainsReferences<T>());
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}
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}
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}
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}
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@ -108,7 +108,7 @@ namespace Ryujinx.Common.Memory
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[MethodImpl(MethodImplOptions.AggressiveInlining)]
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[MethodImpl(MethodImplOptions.AggressiveInlining)]
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public void Dispose()
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public void Dispose()
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{
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{
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ArrayPool<T>.Shared.Return(_array);
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ArrayPool<T>.Shared.Return(_array, RuntimeHelpers.IsReferenceOrContainsReferences<T>());
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}
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}
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}
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}
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}
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}
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@ -616,7 +616,7 @@ namespace Ryujinx.HLE.HOS.Kernel.SupervisorCall
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}
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}
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}
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}
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ArrayPool<KSynchronizationObject>.Shared.Return(syncObjsArray);
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ArrayPool<KSynchronizationObject>.Shared.Return(syncObjsArray, true);
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return result;
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return result;
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}
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}
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@ -1546,8 +1546,8 @@ namespace Ryujinx.HLE.HOS.Kernel.SupervisorCall
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#pragma warning disable CA1822 // Mark member as static
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#pragma warning disable CA1822 // Mark member as static
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public Result SetProcessMemoryPermission(
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public Result SetProcessMemoryPermission(
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int handle,
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int handle,
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[PointerSized] ulong src,
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ulong src,
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[PointerSized] ulong size,
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ulong size,
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KMemoryPermission permission)
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KMemoryPermission permission)
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{
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{
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if (!PageAligned(src))
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if (!PageAligned(src))
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@ -104,7 +104,7 @@ namespace Ryujinx.HLE.HOS.Kernel.Threading
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}
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}
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}
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}
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ArrayPool<LinkedListNode<KThread>>.Shared.Return(syncNodesArray);
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ArrayPool<LinkedListNode<KThread>>.Shared.Return(syncNodesArray, true);
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}
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}
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_context.CriticalSection.Leave();
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_context.CriticalSection.Leave();
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Reference in New Issue
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