GTK & Avalonia changes (#3480)

* Fix decoding of block after BRA.CC instructions without predicate

* Shader cache version bump

.github/workflows/build.yml

@@ -39,13 +39,14 @@ jobs:
 
         - os: windows-latest
           OS_NAME: Windows x64
-          DOTNET_RUNTIME_IDENTIFIER: win-x64
+          DOTNET_RUNTIME_IDENTIFIER: win10-x64
           RELEASE_ZIP_OS_NAME: win_x64
 
       fail-fast: false
     env:
       POWERSHELL_TELEMETRY_OPTOUT: 1
       DOTNET_CLI_TELEMETRY_OPTOUT: 1
+      RYUJINX_BASE_VERSION: "1.1.0"
     steps:
       - uses: actions/checkout@v2
       - uses: actions/setup-dotnet@v1
@@ -59,24 +60,33 @@ jobs:
       - name: Clear
         run: dotnet clean && dotnet nuget locals all --clear
       - name: Build
-        run: dotnet build -c "${{ matrix.configuration }}" /p:Version="1.1.0" /p:SourceRevisionId="${{ steps.git_short_hash.outputs.result }}" /p:ExtraDefineConstants=DISABLE_UPDATER
+        run: dotnet build -c "${{ matrix.configuration }}" /p:Version="${{ env.RYUJINX_BASE_VERSION }}" /p:SourceRevisionId="${{ steps.git_short_hash.outputs.result }}" /p:ExtraDefineConstants=DISABLE_UPDATER
       - name: Test
         run: dotnet test -c "${{ matrix.configuration }}"
       - name: Publish Ryujinx
-        run: dotnet publish -c "${{ matrix.configuration }}" -r "${{ matrix.DOTNET_RUNTIME_IDENTIFIER }}" -o ./publish /p:Version="1.1.0" /p:DebugType=embedded /p:SourceRevisionId="${{ steps.git_short_hash.outputs.result }}" /p:ExtraDefineConstants=DISABLE_UPDATER Ryujinx --self-contained
+        run: dotnet publish -c "${{ matrix.configuration }}" -r "${{ matrix.DOTNET_RUNTIME_IDENTIFIER }}" -o ./publish /p:Version="${{ env.RYUJINX_BASE_VERSION }}" /p:DebugType=embedded /p:SourceRevisionId="${{ steps.git_short_hash.outputs.result }}" /p:ExtraDefineConstants=DISABLE_UPDATER Ryujinx --self-contained
         if: github.event_name == 'pull_request'
       - name: Publish Ryujinx.Headless.SDL2
-        run: dotnet publish -c "${{ matrix.configuration }}" -r "${{ matrix.DOTNET_RUNTIME_IDENTIFIER }}" -o ./publish_sdl2_headless /p:Version="1.1.0" /p:DebugType=embedded /p:SourceRevisionId="${{ steps.git_short_hash.outputs.result }}" /p:ExtraDefineConstants=DISABLE_UPDATER Ryujinx.Headless.SDL2 --self-contained
+        run: dotnet publish -c "${{ matrix.configuration }}" -r "${{ matrix.DOTNET_RUNTIME_IDENTIFIER }}" -o ./publish_sdl2_headless /p:Version="${{ env.RYUJINX_BASE_VERSION }}" /p:DebugType=embedded /p:SourceRevisionId="${{ steps.git_short_hash.outputs.result }}" /p:ExtraDefineConstants=DISABLE_UPDATER Ryujinx.Headless.SDL2 --self-contained
+        if: github.event_name == 'pull_request'
+      - name: Publish Ryujinx.Ava
+        run: dotnet publish -c "${{ matrix.configuration }}" -r "${{ matrix.DOTNET_RUNTIME_IDENTIFIER }}" -o ./publish_ava /p:Version="1.0.0" /p:DebugType=embedded /p:SourceRevisionId="${{ steps.git_short_hash.outputs.result }}" /p:ExtraDefineConstants=DISABLE_UPDATER Ryujinx.Ava
         if: github.event_name == 'pull_request'
       - name: Upload Ryujinx artifact
         uses: actions/upload-artifact@v2
         with:
-          name: ryujinx-${{ matrix.configuration }}-1.0.0+${{ steps.git_short_hash.outputs.result }}-${{ matrix.RELEASE_ZIP_OS_NAME }}
+          name: ryujinx-${{ matrix.configuration }}-${{ env.RYUJINX_BASE_VERSION }}+${{ steps.git_short_hash.outputs.result }}-${{ matrix.RELEASE_ZIP_OS_NAME }}
           path: publish
         if: github.event_name == 'pull_request'
       - name: Upload Ryujinx.Headless.SDL2 artifact
         uses: actions/upload-artifact@v2
         with:
-          name: ryujinx-headless-sdl2-${{ matrix.configuration }}-1.0.0+${{ steps.git_short_hash.outputs.result }}-${{ matrix.RELEASE_ZIP_OS_NAME }}
+          name: sdl2-ryujinx-headless-${{ matrix.configuration }}-${{ env.RYUJINX_BASE_VERSION }}+${{ steps.git_short_hash.outputs.result }}-${{ matrix.RELEASE_ZIP_OS_NAME }}
           path: publish_sdl2_headless
         if: github.event_name == 'pull_request'
+      - name: Upload Ryujinx.Ava artifact
+        uses: actions/upload-artifact@v2
+        with:
+          name: ava-ryujinx-${{ matrix.configuration }}-${{ env.RYUJINX_BASE_VERSION }}+${{ steps.git_short_hash.outputs.result }}-${{ matrix.RELEASE_ZIP_OS_NAME }}
+          path: publish_ava
+        if: github.event_name == 'pull_request'

.github/workflows/nightly_pr_comment.yml

@@ -36,15 +36,25 @@ jobs:
               return core.error(`No artifacts found`);
             }
             let body = `Download the artifacts for this pull request:\n`;
+            let hidden_avalonia_artifacts = `\n\n <details><summary>Experimental GUI (Avalonia)</summary>\n`;
+            let hidden_headless_artifacts = `\n\n <details><summary>GUI-less (SDL2)</summary>\n`;
             let hidden_debug_artifacts = `\n\n <details><summary>Only for Developers</summary>\n`;
             for (const art of artifacts) {
               if(art.name.includes('Debug')) {
                 hidden_debug_artifacts += `\n* [${art.name}](https://nightly.link/${owner}/${repo}/actions/artifacts/${art.id}.zip)`;
+              } else if(art.name.includes('ava-ryujinx')) {
+                hidden_avalonia_artifacts += `\n* [${art.name}](https://nightly.link/${owner}/${repo}/actions/artifacts/${art.id}.zip)`;
+              } else if(art.name.includes('sdl2-ryujinx-headless')) {
+                hidden_headless_artifacts += `\n* [${art.name}](https://nightly.link/${owner}/${repo}/actions/artifacts/${art.id}.zip)`;
               } else {
                 body += `\n* [${art.name}](https://nightly.link/${owner}/${repo}/actions/artifacts/${art.id}.zip)`;
               }
             }
+            hidden_avalonia_artifacts += `\n</details>`;
+            hidden_headless_artifacts += `\n</details>`;
             hidden_debug_artifacts += `\n</details>`;
+            body += hidden_avalonia_artifacts;
+            body += hidden_headless_artifacts;
             body += hidden_debug_artifacts;
 
             const {data: comments} = await github.issues.listComments({repo, owner, issue_number});

.github/workflows/release.yml

@@ -51,8 +51,9 @@ jobs:
         run: "mkdir release_output"
       - name: Publish Windows
         run: |
-          dotnet publish -c Release -r win-x64 -o ./publish_windows/publish /p:Version="${{ steps.version_info.outputs.build_version }}" /p:SourceRevisionId="${{ steps.version_info.outputs.git_short_hash }}" /p:DebugType=embedded Ryujinx --self-contained
-          dotnet publish -c Release -r win-x64 -o ./publish_windows_sdl2_headless/publish /p:Version="${{ steps.version_info.outputs.build_version }}" /p:SourceRevisionId="${{ steps.version_info.outputs.git_short_hash }}" /p:DebugType=embedded Ryujinx.Headless.SDL2 --self-contained
+          dotnet publish -c Release -r win10-x64 -o ./publish_windows/publish /p:Version="${{ steps.version_info.outputs.build_version }}" /p:SourceRevisionId="${{ steps.version_info.outputs.git_short_hash }}" /p:DebugType=embedded Ryujinx --self-contained
+          dotnet publish -c Release -r win10-x64 -o ./publish_windows_sdl2_headless/publish /p:Version="${{ steps.version_info.outputs.build_version }}" /p:SourceRevisionId="${{ steps.version_info.outputs.git_short_hash }}" /p:DebugType=embedded Ryujinx.Headless.SDL2 --self-contained
+          dotnet publish -c Release -r win10-x64 -o ./publish_windows_ava/publish /p:Version="${{ steps.version_info.outputs.build_version }}" /p:SourceRevisionId="${{ steps.version_info.outputs.git_short_hash }}" /p:DebugType=embedded Ryujinx.Ava --self-contained
       - name: Packing Windows builds
         run: |
           pushd publish_windows
@@ -60,7 +61,11 @@ jobs:
           popd
 
           pushd publish_windows_sdl2_headless
-          7z a ../release_output/ryujinx-headless-sdl2-${{ steps.version_info.outputs.build_version }}-win_x64.zip publish
+          7z a ../release_output/sdl2-ryujinx-headless-${{ steps.version_info.outputs.build_version }}-win_x64.zip publish
+          popd
+
+          pushd publish_windows_ava
+          7z a ../release_output/test-ava-ryujinx-${{ steps.version_info.outputs.build_version }}-win_x64.zip publish
           popd
         shell: bash
 
@@ -68,6 +73,7 @@ jobs:
         run: |
           dotnet publish -c Release -r linux-x64 -o ./publish_linux/publish /p:Version="${{ steps.version_info.outputs.build_version }}" /p:SourceRevisionId="${{ steps.version_info.outputs.git_short_hash }}" /p:DebugType=embedded Ryujinx --self-contained
           dotnet publish -c Release -r linux-x64 -o ./publish_linux_sdl2_headless/publish /p:Version="${{ steps.version_info.outputs.build_version }}" /p:SourceRevisionId="${{ steps.version_info.outputs.git_short_hash }}" /p:DebugType=embedded Ryujinx.Headless.SDL2 --self-contained
+          dotnet publish -c Release -r linux-x64 -o ./publish_linux_ava/publish /p:Version="${{ steps.version_info.outputs.build_version }}" /p:SourceRevisionId="${{ steps.version_info.outputs.git_short_hash }}" /p:DebugType=embedded Ryujinx.Ava --self-contained
 
       - name: Packing Linux builds
         run: |
@@ -76,7 +82,11 @@ jobs:
           popd
 
           pushd publish_linux_sdl2_headless
-          tar -czvf ../release_output/ryujinx-headless-sdl2-${{ steps.version_info.outputs.build_version }}-linux_x64.tar.gz publish
+          tar -czvf ../release_output/sdl2-ryujinx-headless-${{ steps.version_info.outputs.build_version }}-linux_x64.tar.gz publish
+          popd
+
+          pushd publish_linux_ava
+          tar -czvf ../release_output/test-ava-ryujinx-${{ steps.version_info.outputs.build_version }}-linux_x64.tar.gz publish
           popd
         shell: bash
 

ARMeilleure/CodeGen/Optimizations/TailMerge.cs

@@ -59,7 +59,7 @@ namespace ARMeilleure.CodeGen.Optimizations
             BasicBlock fromPred = from.Predecessors.Count == 1 ? from.Predecessors[0] : null;
 
             // If the block is empty, we can try to append to the predecessor and avoid unnecessary jumps.
-            if (from.Operations.Count == 0 && fromPred != null)
+            if (from.Operations.Count == 0 && fromPred != null && fromPred.SuccessorsCount == 1)
             {
                 for (int i = 0; i < fromPred.SuccessorsCount; i++)
                 {

ARMeilleure/Decoders/Decoder.cs

@@ -18,7 +18,7 @@ namespace ARMeilleure.Decoders
         // For lower code quality translation, we set a lower limit since we're blocking execution.
         private const int MaxInstsPerFunctionLowCq = 500;
 
-        public static Block[] Decode(IMemoryManager memory, ulong address, ExecutionMode mode, bool highCq, bool singleBlock)
+        public static Block[] Decode(IMemoryManager memory, ulong address, ExecutionMode mode, bool highCq, DecoderMode dMode)
         {
             List<Block> blocks = new List<Block>();
 
@@ -38,7 +38,7 @@ namespace ARMeilleure.Decoders
                 {
                     block = new Block(blkAddress);
 
-                    if ((singleBlock && visited.Count >= 1) || opsCount > instructionLimit || !memory.IsMapped(blkAddress))
+                    if ((dMode != DecoderMode.MultipleBlocks && visited.Count >= 1) || opsCount > instructionLimit || !memory.IsMapped(blkAddress))
                     {
                         block.Exit = true;
                         block.EndAddress = blkAddress;
@@ -96,6 +96,12 @@ namespace ARMeilleure.Decoders
                         }
                     }
 
+                    if (dMode == DecoderMode.SingleInstruction)
+                    {
+                        // Only read at most one instruction
+                        limitAddress = currBlock.Address + 1;
+                    }
+
                     FillBlock(memory, mode, currBlock, limitAddress);
 
                     opsCount += currBlock.OpCodes.Count;
@@ -115,7 +121,7 @@ namespace ARMeilleure.Decoders
                             currBlock.Branch = GetBlock((ulong)op.Immediate);
                         }
 
-                        if (!IsUnconditionalBranch(lastOp) || isCall)
+                        if (isCall || !(IsUnconditionalBranch(lastOp) || IsTrap(lastOp)))
                         {
                             currBlock.Next = GetBlock(currBlock.EndAddress);
                         }
@@ -143,7 +149,7 @@ namespace ARMeilleure.Decoders
                 throw new InvalidOperationException($"Decoded a single empty exit block. Entry point = 0x{address:X}.");
             }
 
-            if (!singleBlock)
+            if (dMode == DecoderMode.MultipleBlocks)
             {
                 return TailCallRemover.RunPass(address, blocks);
             }
@@ -195,12 +201,13 @@ namespace ARMeilleure.Decoders
             ulong          limitAddress)
         {
             ulong address = block.Address;
+            int itBlockSize = 0;
 
             OpCode opCode;
 
             do
             {
-                if (address >= limitAddress)
+                if (address >= limitAddress && itBlockSize == 0)
                 {
                     break;
                 }
@@ -210,6 +217,15 @@ namespace ARMeilleure.Decoders
                 block.OpCodes.Add(opCode);
 
                 address += (ulong)opCode.OpCodeSizeInBytes;
+
+                if (opCode is OpCodeT16IfThen it)
+                {
+                    itBlockSize = it.IfThenBlockSize;
+                }
+                else if (itBlockSize > 0)
+                {
+                    itBlockSize--;
+                }
             }
             while (!(IsBranch(opCode) || IsException(opCode)));
 
@@ -247,6 +263,11 @@ namespace ARMeilleure.Decoders
             // so we must consider such operations as a branch in potential aswell.
             if (opCode is IOpCode32Alu opAlu && opAlu.Rd == RegisterAlias.Aarch32Pc)
             {
+                if (opCode is OpCodeT32)
+                {
+                    return opCode.Instruction.Name != InstName.Tst && opCode.Instruction.Name != InstName.Teq &&
+                           opCode.Instruction.Name != InstName.Cmp && opCode.Instruction.Name != InstName.Cmn;
+                }
                 return true;
             }
 
@@ -308,9 +329,13 @@ namespace ARMeilleure.Decoders
         }
 
         private static bool IsException(OpCode opCode)
+        {
+            return IsTrap(opCode) || opCode.Instruction.Name == InstName.Svc;
+        }
+
+        private static bool IsTrap(OpCode opCode)
         {
             return opCode.Instruction.Name == InstName.Brk ||
-                   opCode.Instruction.Name == InstName.Svc ||
                    opCode.Instruction.Name == InstName.Trap ||
                    opCode.Instruction.Name == InstName.Und;
         }
@@ -344,9 +369,16 @@ namespace ARMeilleure.Decoders
                 return makeOp(inst, address, opCode);
             }
             else
+            {
+                if (mode == ExecutionMode.Aarch32Thumb)
+                {
+                    return new OpCodeT16(inst, address, opCode);
+                }
+                else
                 {
                     return new OpCode(inst, address, opCode);
                 }
             }
         }
     }
+}

ARMeilleure/Decoders/DecoderMode.cs

@@ -0,0 +1,9 @@
+namespace ARMeilleure.Decoders
+{
+    enum DecoderMode
+    {
+        MultipleBlocks,
+        SingleBlock,
+        SingleInstruction,
+    }
+}

ARMeilleure/Decoders/IOpCode32Adr.cs

@@ -0,0 +1,9 @@
+namespace ARMeilleure.Decoders
+{
+    interface IOpCode32Adr
+    {
+        int Rd { get; }
+
+        int Immediate { get; }
+    }
+}

ARMeilleure/Decoders/IOpCode32Alu.cs

@@ -1,10 +1,8 @@
 namespace ARMeilleure.Decoders
 {
-    interface IOpCode32Alu : IOpCode32
+    interface IOpCode32Alu : IOpCode32, IOpCode32HasSetFlags
     {
         int Rd { get; }
         int Rn { get; }
-
-        bool SetFlags { get; }
     }
 }

ARMeilleure/Decoders/IOpCode32AluImm.cs

@@ -0,0 +1,9 @@
+namespace ARMeilleure.Decoders
+{
+    interface IOpCode32AluImm : IOpCode32Alu
+    {
+        int Immediate { get; }
+
+        bool IsRotated { get; }
+    }
+}

ARMeilleure/Decoders/IOpCode32AluRsImm.cs

@@ -0,0 +1,10 @@
+namespace ARMeilleure.Decoders
+{
+    interface IOpCode32AluRsImm : IOpCode32Alu
+    {
+        int Rm { get; }
+        int Immediate { get; }
+
+        ShiftType ShiftType { get; }
+    }
+}

ARMeilleure/Decoders/IOpCode32AluRsReg.cs

@@ -0,0 +1,10 @@
+namespace ARMeilleure.Decoders
+{
+    interface IOpCode32AluRsReg : IOpCode32Alu
+    {
+        int Rm { get; }
+        int Rs { get; }
+
+        ShiftType ShiftType { get; }
+    }
+}

ARMeilleure/Decoders/IOpCode32Exception.cs

@@ -0,0 +1,6 @@
+namespace ARMeilleure.Decoders;
+
+interface IOpCode32Exception
+{
+    int Id { get; }
+}

ARMeilleure/Decoders/IOpCode32HasSetFlags.cs

@@ -0,0 +1,7 @@
+namespace ARMeilleure.Decoders
+{
+    interface IOpCode32HasSetFlags
+    {
+        bool? SetFlags { get; }
+    }
+}

ARMeilleure/Decoders/IOpCode32Mem.cs

@@ -7,5 +7,9 @@ namespace ARMeilleure.Decoders
 
         bool WBack { get; }
         bool IsLoad { get; }
+        bool Index { get; }
+        bool Add { get; }
+
+        int Immediate { get; }
     }
 }

ARMeilleure/Decoders/IOpCode32MemMult.cs

@@ -9,5 +9,7 @@ namespace ARMeilleure.Decoders
         int PostOffset { get; }
 
         bool IsLoad { get; }
+
+        int Offset { get; }
     }
 }

ARMeilleure/Decoders/IOpCode32MemReg.cs

@@ -0,0 +1,7 @@
+namespace ARMeilleure.Decoders
+{
+    interface IOpCode32MemReg : IOpCode32Mem
+    {
+        int Rm { get; }
+    }
+}

ARMeilleure/Decoders/OpCode.cs

@@ -18,11 +18,10 @@ namespace ARMeilleure.Decoders
 
         public OpCode(InstDescriptor inst, ulong address, int opCode)
         {
+            Instruction = inst;
             Address     = address;
             RawOpCode   = opCode;
 
-            Instruction = inst;
-
             RegisterSize = RegisterSize.Int64;
         }
 

ARMeilleure/Decoders/OpCode32.cs

@@ -13,11 +13,25 @@ namespace ARMeilleure.Decoders
             Cond = (Condition)((uint)opCode >> 28);
         }
 
+        public bool IsThumb()
+        {
+            return this is OpCodeT16 || this is OpCodeT32;
+        }
+
         public uint GetPc()
         {
             // Due to backwards compatibility and legacy behavior of ARMv4 CPUs pipeline,
             // the PC actually points 2 instructions ahead.
-            return (uint)Address + (uint)OpCodeSizeInBytes * 2;
+            if (IsThumb())
+            {
+                // PC is ahead by 4 in thumb mode whether or not the current instruction
+                // is 16 or 32 bit.
+                return (uint)Address + 4u;
+            }
+            else
+            {
+                return (uint)Address + 8u;
+            }
         }
     }
 }

ARMeilleure/Decoders/OpCode32Alu.cs

@@ -5,7 +5,7 @@ namespace ARMeilleure.Decoders
         public int Rd { get; }
         public int Rn { get; }
 
-        public bool SetFlags { get; }
+        public bool? SetFlags { get; }
 
         public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCode32Alu(inst, address, opCode);
 

ARMeilleure/Decoders/OpCode32AluImm.cs

@@ -2,7 +2,7 @@ using ARMeilleure.Common;
 
 namespace ARMeilleure.Decoders
 {
-    class OpCode32AluImm : OpCode32Alu
+    class OpCode32AluImm : OpCode32Alu, IOpCode32AluImm
     {
         public int Immediate { get; }
 

ARMeilleure/Decoders/OpCode32AluMla.cs

@@ -10,7 +10,7 @@
         public bool NHigh { get; }
         public bool MHigh { get; }
         public bool R { get; }
-        public bool SetFlags { get; }
+        public bool? SetFlags { get; }
 
         public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCode32AluMla(inst, address, opCode);
 

ARMeilleure/Decoders/OpCode32AluRsImm.cs

@@ -1,6 +1,6 @@
 namespace ARMeilleure.Decoders
 {
-    class OpCode32AluRsImm : OpCode32Alu
+    class OpCode32AluRsImm : OpCode32Alu, IOpCode32AluRsImm
     {
         public int Rm        { get; }
         public int Immediate { get; }

ARMeilleure/Decoders/OpCode32AluRsReg.cs

@@ -1,6 +1,6 @@
 namespace ARMeilleure.Decoders
 {
-    class OpCode32AluRsReg : OpCode32Alu
+    class OpCode32AluRsReg : OpCode32Alu, IOpCode32AluRsReg
     {
         public int Rm { get; }
         public int Rs { get; }

ARMeilleure/Decoders/OpCode32AluUmull.cs

@@ -1,6 +1,6 @@
 namespace ARMeilleure.Decoders
 {
-    class OpCode32AluUmull : OpCode32
+    class OpCode32AluUmull : OpCode32, IOpCode32HasSetFlags
     {
         public int RdLo { get; }
         public int RdHi { get; }
@@ -10,7 +10,7 @@
         public bool NHigh { get; }
         public bool MHigh { get; }
 
-        public bool SetFlags { get; }
+        public bool? SetFlags { get; }
         public DataOp DataOp { get; }
 
         public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCode32AluUmull(inst, address, opCode);

ARMeilleure/Decoders/OpCode32Exception.cs

@@ -1,6 +1,6 @@
 namespace ARMeilleure.Decoders
 {
-    class OpCode32Exception : OpCode32
+    class OpCode32Exception : OpCode32, IOpCode32Exception
     {
         public int Id { get; }
 

ARMeilleure/Decoders/OpCode32MemReg.cs

@@ -1,6 +1,6 @@
 namespace ARMeilleure.Decoders
 {
-    class OpCode32MemReg : OpCode32Mem
+    class OpCode32MemReg : OpCode32Mem, IOpCode32MemReg
     {
         public int Rm { get; }
 

ARMeilleure/Decoders/OpCodeT16AddSubImm3.cs

@@ -0,0 +1,24 @@
+namespace ARMeilleure.Decoders
+{
+    class OpCodeT16AddSubImm3: OpCodeT16, IOpCode32AluImm
+    {
+        public int Rd { get; }
+        public int Rn { get; }
+
+        public bool? SetFlags => null;
+
+        public int Immediate { get; }
+
+        public bool IsRotated { get; }
+
+        public static new OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCodeT16AddSubImm3(inst, address, opCode);
+
+        public OpCodeT16AddSubImm3(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode)
+        {
+            Rd        = (opCode >> 0) & 0x7;
+            Rn        = (opCode >> 3) & 0x7;
+            Immediate = (opCode >> 6) & 0x7;
+            IsRotated = false;
+        }
+    }
+}

ARMeilleure/Decoders/OpCodeT16AddSubReg.cs

@@ -0,0 +1,20 @@
+namespace ARMeilleure.Decoders
+{
+    class OpCodeT16AddSubReg : OpCodeT16, IOpCode32AluReg
+    {
+        public int Rm { get; }
+        public int Rd { get; }
+        public int Rn { get; }
+
+        public bool? SetFlags => null;
+
+        public static new OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCodeT16AddSubReg(inst, address, opCode);
+
+        public OpCodeT16AddSubReg(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode)
+        {
+            Rd = (opCode >> 0) & 0x7;
+            Rn = (opCode >> 3) & 0x7;
+            Rm = (opCode >> 6) & 0x7;
+        }
+    }
+}

ARMeilleure/Decoders/OpCodeT16AddSubSp.cs

@@ -0,0 +1,23 @@
+using ARMeilleure.State;
+
+namespace ARMeilleure.Decoders
+{
+    class OpCodeT16AddSubSp : OpCodeT16, IOpCode32AluImm
+    {
+        public int Rd => RegisterAlias.Aarch32Sp;
+        public int Rn => RegisterAlias.Aarch32Sp;
+
+        public bool? SetFlags => false;
+
+        public int Immediate { get; }
+
+        public bool IsRotated => false;
+
+        public static new OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCodeT16AddSubSp(inst, address, opCode);
+
+        public OpCodeT16AddSubSp(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode)
+        {
+            Immediate = ((opCode >> 0) & 0x7f) << 2;
+        }
+    }
+}

ARMeilleure/Decoders/OpCodeT16Adr.cs

@@ -0,0 +1,20 @@
+namespace ARMeilleure.Decoders
+{
+    class OpCodeT16Adr : OpCodeT16, IOpCode32Adr
+    {
+        public int Rd { get; }
+
+        public bool Add => true;
+        public int Immediate { get; }
+
+        public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCodeT16Adr(inst, address, opCode);
+
+        public OpCodeT16Adr(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode)
+        {
+            Rd  = (opCode >> 8) & 7;
+
+            int imm = (opCode & 0xff) << 2;
+            Immediate = (int)(GetPc() & 0xfffffffc) + imm;
+        }
+    }
+}

ARMeilleure/Decoders/OpCodeT16AluImm8.cs

@@ -1,22 +1,24 @@
-namespace ARMeilleure.Decoders
+namespace ARMeilleure.Decoders
 {
-    class OpCodeT16AluImm8 : OpCodeT16, IOpCode32Alu
+    class OpCodeT16AluImm8 : OpCodeT16, IOpCode32AluImm
     {
-        private int _rdn;
+        public int Rd { get; }
+        public int Rn { get; }
 
-        public int Rd => _rdn;
-        public int Rn => _rdn;
-
-        public bool SetFlags => false;
+        public bool? SetFlags => null;
 
         public int Immediate { get; }
 
-        public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCodeT16AluImm8(inst, address, opCode);
+        public bool IsRotated { get; }
+
+        public static new OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCodeT16AluImm8(inst, address, opCode);
 
         public OpCodeT16AluImm8(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode)
         {
+            Rd = (opCode >> 8) & 0x7;
+            Rn = (opCode >> 8) & 0x7;
             Immediate = (opCode >> 0) & 0xff;
-            _rdn      = (opCode >> 8) & 0x7;
+            IsRotated = false;
         }
     }
 }

ARMeilleure/Decoders/OpCodeT16AluImmZero.cs

@@ -0,0 +1,24 @@
+namespace ARMeilleure.Decoders
+{
+    class OpCodeT16AluImmZero : OpCodeT16, IOpCode32AluImm
+    {
+        public int Rd { get; }
+        public int Rn { get; }
+
+        public bool? SetFlags => null;
+
+        public int Immediate { get; }
+
+        public bool IsRotated { get; }
+
+        public static new OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCodeT16AluImmZero(inst, address, opCode);
+
+        public OpCodeT16AluImmZero(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode)
+        {
+            Rd = (opCode >> 0) & 0x7;
+            Rn = (opCode >> 3) & 0x7;
+            Immediate = 0;
+            IsRotated = false;
+        }
+    }
+}

ARMeilleure/Decoders/OpCodeT16AluRegHigh.cs

@@ -0,0 +1,20 @@
+namespace ARMeilleure.Decoders
+{
+    class OpCodeT16AluRegHigh : OpCodeT16, IOpCode32AluReg
+    {
+        public int Rm { get; }
+        public int Rd { get; }
+        public int Rn { get; }
+
+        public bool? SetFlags => false;
+
+        public static new OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCodeT16AluRegHigh(inst, address, opCode);
+
+        public OpCodeT16AluRegHigh(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode)
+        {
+            Rd = ((opCode >> 0) & 0x7) | ((opCode >> 4) & 0x8);
+            Rn = ((opCode >> 0) & 0x7) | ((opCode >> 4) & 0x8);
+            Rm = (opCode >> 3) & 0xf;
+        }
+    }
+}

ARMeilleure/Decoders/OpCodeT16AluRegLow.cs

@@ -0,0 +1,20 @@
+namespace ARMeilleure.Decoders
+{
+    class OpCodeT16AluRegLow : OpCodeT16, IOpCode32AluReg
+    {
+        public int Rm { get; }
+        public int Rd { get; }
+        public int Rn { get; }
+
+        public bool? SetFlags => null;
+
+        public static new OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCodeT16AluRegLow(inst, address, opCode);
+
+        public OpCodeT16AluRegLow(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode)
+        {
+            Rd = (opCode >> 0) & 0x7;
+            Rn = (opCode >> 0) & 0x7;
+            Rm = (opCode >> 3) & 0x7;
+        }
+    }
+}

ARMeilleure/Decoders/OpCodeT16AluUx.cs

@@ -0,0 +1,22 @@
+namespace ARMeilleure.Decoders
+{
+    class OpCodeT16AluUx : OpCodeT16, IOpCode32AluUx
+    {
+        public int Rm { get; }
+        public int Rd { get; }
+        public int Rn { get; }
+
+        public bool? SetFlags => false;
+
+        public int RotateBits => 0;
+        public bool Add => false;
+
+        public static new OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCodeT16AluUx(inst, address, opCode);
+
+        public OpCodeT16AluUx(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode)
+        {
+            Rd = (opCode >> 0) & 0x7;
+            Rm = (opCode >> 3) & 0x7;
+        }
+    }
+}

ARMeilleure/Decoders/OpCodeT16BImm11.cs

@@ -0,0 +1,15 @@
+namespace ARMeilleure.Decoders
+{
+    class OpCodeT16BImm11 : OpCodeT16, IOpCode32BImm
+    {
+        public long Immediate { get; }
+
+        public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCodeT16BImm11(inst, address, opCode);
+
+        public OpCodeT16BImm11(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode)
+        {
+            int imm = (opCode << 21) >> 20; 
+            Immediate = GetPc() + imm;
+        }
+    }
+}

ARMeilleure/Decoders/OpCodeT16BImm8.cs

@@ -0,0 +1,17 @@
+namespace ARMeilleure.Decoders
+{
+    class OpCodeT16BImm8 : OpCodeT16, IOpCode32BImm
+    {
+        public long Immediate { get; }
+
+        public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCodeT16BImm8(inst, address, opCode);
+
+        public OpCodeT16BImm8(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode)
+        {
+            Cond = (Condition)((opCode >> 8) & 0xf);
+
+            int imm = (opCode << 24) >> 23; 
+            Immediate = GetPc() + imm;
+        }
+    }
+}

ARMeilleure/Decoders/OpCodeT16BImmCmp.cs

@@ -0,0 +1,19 @@
+namespace ARMeilleure.Decoders
+{
+    class OpCodeT16BImmCmp : OpCodeT16
+    {
+        public int Rn { get; }
+
+        public int Immediate { get; }
+
+        public static new OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCodeT16BImmCmp(inst, address, opCode);
+
+        public OpCodeT16BImmCmp(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode)
+        {
+            Rn = (opCode >> 0) & 0x7;
+
+            int imm = ((opCode >> 2) & 0x3e) | ((opCode >> 3) & 0x40);
+            Immediate = (int)GetPc() + imm;
+        }
+    }
+}

ARMeilleure/Decoders/OpCodeT16BReg.cs

@@ -1,4 +1,4 @@
-namespace ARMeilleure.Decoders
+namespace ARMeilleure.Decoders
 {
     class OpCodeT16BReg : OpCodeT16, IOpCode32BReg
     {

ARMeilleure/Decoders/OpCodeT16Exception.cs

@@ -0,0 +1,14 @@
+namespace ARMeilleure.Decoders
+{
+    class OpCodeT16Exception : OpCodeT16, IOpCode32Exception
+    {
+        public int Id { get; }
+
+        public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCodeT16Exception(inst, address, opCode);
+
+        public OpCodeT16Exception(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode)
+        {
+            Id = opCode & 0xFF;
+        }
+    }
+}

ARMeilleure/Decoders/OpCodeT16IfThen.cs

@@ -0,0 +1,34 @@
+using System.Collections.Generic;
+using System.Reflection.Emit;
+
+namespace ARMeilleure.Decoders
+{
+    class OpCodeT16IfThen : OpCodeT16
+    {
+        public Condition[] IfThenBlockConds { get; }
+
+        public int IfThenBlockSize { get { return IfThenBlockConds.Length; } }
+
+        public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCodeT16IfThen(inst, address, opCode);
+
+        public OpCodeT16IfThen(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode)
+        {
+            List<Condition> conds = new();
+
+            int cond = (opCode >> 4) & 0xf;
+            int mask = opCode & 0xf;
+
+            conds.Add((Condition)cond);
+
+            while ((mask & 7) != 0)
+            {
+                int newLsb = (mask >> 3) & 1;
+                cond = (cond & 0xe) | newLsb;
+                mask <<= 1;
+                conds.Add((Condition)cond);
+            }
+
+            IfThenBlockConds = conds.ToArray();
+        }
+    }
+}

ARMeilleure/Decoders/OpCodeT16MemImm5.cs

@@ -0,0 +1,58 @@
+using ARMeilleure.Instructions;
+using System;
+
+namespace ARMeilleure.Decoders
+{
+    class OpCodeT16MemImm5 : OpCodeT16, IOpCode32Mem
+    {
+        public int Rt { get; }
+        public int Rn { get; }
+
+        public bool WBack => false;
+        public bool IsLoad { get; }
+        public bool Index => true;
+        public bool Add => true;
+
+        public int Immediate { get; }
+
+        public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCodeT16MemImm5(inst, address, opCode);
+
+        public OpCodeT16MemImm5(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode)
+        {
+            Rt = (opCode >> 0) & 7;
+            Rn = (opCode >> 3) & 7;
+
+            switch (inst.Name)
+            {
+                case InstName.Ldr:
+                case InstName.Ldrb:
+                case InstName.Ldrh:
+                    IsLoad = true;
+                    break;
+                case InstName.Str:
+                case InstName.Strb:
+                case InstName.Strh:
+                    IsLoad = false;
+                    break;
+            }
+
+            switch (inst.Name)
+            {
+                case InstName.Str:
+                case InstName.Ldr:
+                    Immediate = ((opCode >> 6) & 0x1f) << 2;
+                    break;
+                case InstName.Strb:
+                case InstName.Ldrb:
+                    Immediate = ((opCode >> 6) & 0x1f);
+                    break;
+                case InstName.Strh:
+                case InstName.Ldrh:
+                    Immediate = ((opCode >> 6) & 0x1f) << 1;
+                    break;
+                default:
+                    throw new InvalidOperationException();
+            }
+        }
+    }
+}

ARMeilleure/Decoders/OpCodeT16MemLit.cs

@@ -0,0 +1,26 @@
+using ARMeilleure.State;
+
+namespace ARMeilleure.Decoders
+{
+    class OpCodeT16MemLit : OpCodeT16, IOpCode32Mem
+    {
+        public int Rt { get; }
+        public int Rn => RegisterAlias.Aarch32Pc;
+
+        public bool WBack => false;
+        public bool IsLoad => true;
+        public bool Index => true;
+        public bool Add => true;
+
+        public int Immediate { get; }
+
+        public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCodeT16MemLit(inst, address, opCode);
+
+        public OpCodeT16MemLit(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode)
+        {
+            Rt = (opCode >> 8) & 7;
+
+            Immediate = (opCode & 0xff) << 2;
+        }
+    }
+}

ARMeilleure/Decoders/OpCodeT16MemMult.cs

@@ -0,0 +1,34 @@
+using ARMeilleure.Instructions;
+using System;
+using System.Numerics;
+
+namespace ARMeilleure.Decoders
+{
+    class OpCodeT16MemMult : OpCodeT16, IOpCode32MemMult
+    {
+        public int Rn { get; }
+        public int RegisterMask { get; }
+        public int PostOffset { get; }
+        public bool IsLoad { get; }
+        public int Offset { get; }
+
+        public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCodeT16MemMult(inst, address, opCode);
+
+        public OpCodeT16MemMult(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode)
+        {
+            RegisterMask = opCode & 0xff;
+            Rn = (opCode >> 8) & 7;
+
+            int regCount = BitOperations.PopCount((uint)RegisterMask);
+
+            Offset = 0;
+            PostOffset = 4 * regCount;
+            IsLoad = inst.Name switch
+            {
+                InstName.Ldm => true,
+                InstName.Stm => false,
+                _ => throw new InvalidOperationException()
+            };
+        }
+    }
+}

ARMeilleure/Decoders/OpCodeT16MemReg.cs

@@ -0,0 +1,27 @@
+namespace ARMeilleure.Decoders
+{
+    class OpCodeT16MemReg : OpCodeT16, IOpCode32MemReg
+    {
+        public int Rm { get; }
+        public int Rt { get; }
+        public int Rn { get; }
+
+        public bool WBack => false;
+        public bool IsLoad { get; }
+        public bool Index => true;
+        public bool Add => true;
+
+        public int Immediate => throw new System.InvalidOperationException();
+
+        public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCodeT16MemReg(inst, address, opCode);
+
+        public OpCodeT16MemReg(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode)
+        {
+            Rt = (opCode >> 0) & 7;
+            Rn = (opCode >> 3) & 7;
+            Rm = (opCode >> 6) & 7;
+
+            IsLoad = ((opCode >> 9) & 7) >= 3;
+        }
+    }
+}

ARMeilleure/Decoders/OpCodeT16MemSp.cs

@@ -0,0 +1,28 @@
+using ARMeilleure.State;
+
+namespace ARMeilleure.Decoders
+{
+    class OpCodeT16MemSp : OpCodeT16, IOpCode32Mem
+    {
+        public int Rt { get; }
+        public int Rn => RegisterAlias.Aarch32Sp;
+
+        public bool WBack => false;
+        public bool IsLoad { get; }
+        public bool Index => true;
+        public bool Add => true;
+
+        public int Immediate { get; }
+
+        public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCodeT16MemSp(inst, address, opCode);
+
+        public OpCodeT16MemSp(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode)
+        {
+            Rt = (opCode >> 8) & 7;
+
+            IsLoad = ((opCode >> 11) & 1) != 0;
+
+            Immediate = ((opCode >> 0) & 0xff) << 2;
+        }
+    }
+}

ARMeilleure/Decoders/OpCodeT16MemStack.cs

@@ -0,0 +1,42 @@
+using ARMeilleure.Instructions;
+using ARMeilleure.State;
+using System;
+using System.Numerics;
+
+namespace ARMeilleure.Decoders
+{
+    class OpCodeT16MemStack : OpCodeT16, IOpCode32MemMult
+    {
+        public int Rn => RegisterAlias.Aarch32Sp;
+        public int RegisterMask { get; }
+        public int PostOffset { get; }
+        public bool IsLoad { get; }
+        public int Offset { get; }
+
+        public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCodeT16MemStack(inst, address, opCode);
+
+        public OpCodeT16MemStack(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode)
+        {
+            int extra = (opCode >> 8) & 1;
+            int regCount = BitOperations.PopCount((uint)opCode & 0x1ff);
+
+            switch (inst.Name)
+            {
+                case InstName.Push:
+                    RegisterMask = (opCode & 0xff) | (extra << 14);
+                    IsLoad = false;
+                    Offset = -4 * regCount;
+                    PostOffset = -4 * regCount;
+                    break;
+                case InstName.Pop:
+                    RegisterMask = (opCode & 0xff) | (extra << 15);
+                    IsLoad = true;
+                    Offset = 0;
+                    PostOffset = 4 * regCount;
+                    break;
+                default:
+                    throw new InvalidOperationException();
+            }
+        }
+    }
+}

ARMeilleure/Decoders/OpCodeT16ShiftImm.cs

@@ -0,0 +1,24 @@
+namespace ARMeilleure.Decoders
+{
+    class OpCodeT16ShiftImm : OpCodeT16, IOpCode32AluRsImm
+    {
+        public int Rd { get; }
+        public int Rn { get; }
+        public int Rm { get; }
+
+        public int Immediate { get; }
+        public ShiftType ShiftType { get; }
+
+        public bool? SetFlags => null;
+
+        public static new OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCodeT16ShiftImm(inst, address, opCode);
+
+        public OpCodeT16ShiftImm(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode)
+        {
+            Rd        = (opCode >> 0) & 0x7;
+            Rm        = (opCode >> 3) & 0x7;
+            Immediate = (opCode >> 6) & 0x1F;
+            ShiftType = (ShiftType)((opCode >> 11) & 3);
+        }
+    }
+}

ARMeilleure/Decoders/OpCodeT16ShiftReg.cs

@@ -0,0 +1,27 @@
+namespace ARMeilleure.Decoders
+{
+    class OpCodeT16ShiftReg : OpCodeT16, IOpCode32AluRsReg
+    {
+        public int Rm { get; }
+        public int Rs { get; }
+        public int Rd { get; }
+
+        public int Rn { get; }
+
+        public ShiftType ShiftType { get; }
+
+        public bool? SetFlags => null;
+
+        public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCodeT16ShiftReg(inst, address, opCode);
+
+        public OpCodeT16ShiftReg(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode)
+        {
+            Rd = (opCode >> 0) & 7;
+            Rm = (opCode >> 0) & 7;
+            Rn = (opCode >> 3) & 7;
+            Rs = (opCode >> 3) & 7;
+
+            ShiftType = (ShiftType)(((opCode >> 6) & 1) | ((opCode >> 7) & 2));
+        }
+    }
+}

ARMeilleure/Decoders/OpCodeT16SpRel.cs

@@ -0,0 +1,24 @@
+using ARMeilleure.State;
+
+namespace ARMeilleure.Decoders
+{
+    class OpCodeT16SpRel : OpCodeT16, IOpCode32AluImm
+    {
+        public int Rd { get; }
+        public int Rn => RegisterAlias.Aarch32Sp;
+
+        public bool? SetFlags => false;
+
+        public int Immediate { get; }
+
+        public bool IsRotated => false;
+
+        public static new OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCodeT16SpRel(inst, address, opCode);
+
+        public OpCodeT16SpRel(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode)
+        {
+            Rd = (opCode >> 8) & 0x7;
+            Immediate = ((opCode >> 0) & 0xff) << 2;
+        }
+    }
+}

ARMeilleure/Decoders/OpCodeT32.cs

@@ -0,0 +1,14 @@
+namespace ARMeilleure.Decoders
+{
+    class OpCodeT32 : OpCode32
+    {
+        public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCodeT32(inst, address, opCode);
+
+        public OpCodeT32(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode)
+        {
+            Cond = Condition.Al;
+
+            OpCodeSizeInBytes = 4;
+        }
+    }
+}

ARMeilleure/Decoders/OpCodeT32Alu.cs

@@ -0,0 +1,20 @@
+namespace ARMeilleure.Decoders
+{
+    class OpCodeT32Alu : OpCodeT32, IOpCode32Alu
+    {
+        public int Rd { get; }
+        public int Rn { get; }
+
+        public bool? SetFlags { get; }
+
+        public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCodeT32Alu(inst, address, opCode);
+
+        public OpCodeT32Alu(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode)
+        {
+            Rd = (opCode >> 8) & 0xf;
+            Rn = (opCode >> 16) & 0xf;
+
+            SetFlags = ((opCode >> 20) & 1) != 0;
+        }
+    }
+}

ARMeilleure/Decoders/OpCodeT32AluImm.cs

@@ -0,0 +1,38 @@
+using ARMeilleure.Common;
+using System.Runtime.Intrinsics;
+
+namespace ARMeilleure.Decoders
+{
+    class OpCodeT32AluImm : OpCodeT32Alu, IOpCode32AluImm
+    {
+        public int Immediate { get; }
+
+        public bool IsRotated { get; }
+
+        public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCodeT32AluImm(inst, address, opCode);
+
+        private static readonly Vector128<int> _factor = Vector128.Create(1, 0x00010001, 0x01000100, 0x01010101);
+
+        public OpCodeT32AluImm(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode)
+        {
+            int imm8 = (opCode >> 0) & 0xff;
+            int imm3 = (opCode >> 12) & 7;
+            int imm1 = (opCode >> 26) & 1;
+
+            int imm12 = imm8 | (imm3 << 8) | (imm1 << 11);
+
+            if ((imm12 >> 10) == 0)
+            {
+                Immediate = imm8 * _factor.GetElement((imm12 >> 8) & 3);
+                IsRotated = false;
+            }
+            else
+            {
+                int shift = imm12 >> 7;
+
+                Immediate = BitUtils.RotateRight(0x80 | (imm12 & 0x7f), shift, 32);
+                IsRotated = shift != 0;
+            }
+        }
+    }
+}

ARMeilleure/Decoders/OpCodeT32AluRsImm.cs

@@ -0,0 +1,20 @@
+namespace ARMeilleure.Decoders
+{
+    class OpCodeT32AluRsImm : OpCodeT32Alu, IOpCode32AluRsImm
+    {
+        public int Rm        { get; }
+        public int Immediate { get; }
+
+        public ShiftType ShiftType { get; }
+
+        public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCodeT32AluRsImm(inst, address, opCode);
+
+        public OpCodeT32AluRsImm(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode)
+        {
+            Rm        = (opCode >> 0) & 0xf;
+            Immediate = ((opCode >> 6) & 3) | ((opCode >> 10) & 0x1c);
+
+            ShiftType = (ShiftType)((opCode >> 4) & 3);
+        }
+    }
+}

ARMeilleure/Decoders/OpCodeT32BImm20.cs

@@ -0,0 +1,29 @@
+using ARMeilleure.Instructions;
+
+namespace ARMeilleure.Decoders
+{
+    class OpCodeT32BImm20 : OpCodeT32, IOpCode32BImm
+    {
+        public long Immediate { get; }
+
+        public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCodeT32BImm20(inst, address, opCode);
+
+        public OpCodeT32BImm20(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode)
+        {
+            uint pc = GetPc();
+
+            int imm11 = (opCode >> 0) & 0x7ff;
+            int j2 = (opCode >> 11) & 1;
+            int j1 = (opCode >> 13) & 1;
+            int imm6 = (opCode >> 16) & 0x3f;
+            int s = (opCode >> 26) & 1;
+
+            int imm32 = imm11 | (imm6 << 11) | (j1 << 17) | (j2 << 18) | (s << 19);
+            imm32 = (imm32 << 13) >> 12;
+
+            Immediate = pc + imm32;
+
+            Cond = (Condition)((opCode >> 22) & 0xf);
+        }
+    }
+}

ARMeilleure/Decoders/OpCodeT32BImm24.cs

@@ -0,0 +1,35 @@
+using ARMeilleure.Instructions;
+
+namespace ARMeilleure.Decoders
+{
+    class OpCodeT32BImm24 : OpCodeT32, IOpCode32BImm
+    {
+        public long Immediate { get; }
+
+        public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCodeT32BImm24(inst, address, opCode);
+
+        public OpCodeT32BImm24(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode)
+        {
+            uint pc = GetPc();
+
+            if (inst.Name == InstName.Blx)
+            {
+                pc &= ~3u;
+            }
+
+            int imm11 = (opCode >> 0) & 0x7ff;
+            int j2 = (opCode >> 11) & 1;
+            int j1 = (opCode >> 13) & 1;
+            int imm10 = (opCode >> 16) & 0x3ff;
+            int s = (opCode >> 26) & 1;
+
+            int i1 = j1 ^ s ^ 1;
+            int i2 = j2 ^ s ^ 1;
+
+            int imm32 = imm11 | (imm10 << 11) | (i2 << 21) | (i1 << 22) | (s << 23);
+            imm32 = (imm32 << 9) >> 8;
+
+            Immediate = pc + imm32;
+        }
+    }
+}

ARMeilleure/Decoders/OpCodeT32MemImm12.cs

@@ -0,0 +1,25 @@
+namespace ARMeilleure.Decoders
+{
+    class OpCodeT32MemImm12 : OpCodeT32, IOpCode32Mem
+    {
+        public int Rt { get; }
+        public int Rn { get; }
+        public bool WBack => false;
+        public bool IsLoad { get; }
+        public bool Index => true;
+        public bool Add => true;
+        public int Immediate { get; }
+
+        public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCodeT32MemImm12(inst, address, opCode);
+
+        public OpCodeT32MemImm12(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode)
+        {
+            Rt = (opCode >> 12) & 0xf;
+            Rn = (opCode >> 16) & 0xf;
+
+            Immediate = opCode & 0xfff;
+
+            IsLoad = ((opCode >> 20) & 1) != 0;
+        }
+    }
+}

ARMeilleure/Decoders/OpCodeT32MemImm8.cs

@@ -0,0 +1,29 @@
+namespace ARMeilleure.Decoders
+{
+    class OpCodeT32MemImm8 : OpCodeT32, IOpCode32Mem
+    {
+        public int Rt { get; }
+        public int Rn { get; }
+        public bool WBack { get; }
+        public bool IsLoad { get; }
+        public bool Index { get; }
+        public bool Add { get; }
+        public int Immediate { get; }
+
+        public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCodeT32MemImm8(inst, address, opCode);
+
+        public OpCodeT32MemImm8(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode)
+        {
+            Rt = (opCode >> 12) & 0xf;
+            Rn = (opCode >> 16) & 0xf;
+
+            Index = ((opCode >> 10) & 1) != 0;
+            Add   = ((opCode >> 9) & 1) != 0;
+            WBack = ((opCode >> 8) & 1) != 0;
+
+            Immediate = opCode & 0xff;
+
+            IsLoad = ((opCode >> 20) & 1) != 0;
+        }
+    }
+}

ARMeilleure/Decoders/OpCodeTable.cs

@@ -1,7 +1,7 @@
 using ARMeilleure.Instructions;
-using ARMeilleure.State;
 using System;
 using System.Collections.Generic;
+using System.Numerics;
 
 namespace ARMeilleure.Decoders
 {
@@ -29,9 +29,9 @@ namespace ARMeilleure.Decoders
             }
         }
 
-        private static List<InstInfo> AllInstA32 = new List<InstInfo>();
-        private static List<InstInfo> AllInstT32 = new List<InstInfo>();
-        private static List<InstInfo> AllInstA64 = new List<InstInfo>();
+        private static List<InstInfo> AllInstA32 = new();
+        private static List<InstInfo> AllInstT32 = new();
+        private static List<InstInfo> AllInstA64 = new();
 
         private static InstInfo[][] InstA32FastLookup = new InstInfo[FastLookupSize][];
         private static InstInfo[][] InstT32FastLookup = new InstInfo[FastLookupSize][];
@@ -628,7 +628,7 @@ namespace ARMeilleure.Decoders
             SetA64("0>001110<<0xxxxx011110xxxxxxxxxx", InstName.Zip2_V,          InstEmit.Zip2_V,          OpCodeSimdReg.Create);
 #endregion
 
-#region "OpCode Table (AArch32)"
+#region "OpCode Table (AArch32, A32)"
             // Base
             SetA32("<<<<0010101xxxxxxxxxxxxxxxxxxxxx", InstName.Adc,     InstEmit32.Adc,     OpCode32AluImm.Create);
             SetA32("<<<<0000101xxxxxxxxxxxxxxxx0xxxx", InstName.Adc,     InstEmit32.Adc,     OpCode32AluRsImm.Create);
@@ -649,7 +649,6 @@ namespace ARMeilleure.Decoders
             SetA32("1111101xxxxxxxxxxxxxxxxxxxxxxxxx", InstName.Blx,     InstEmit32.Blx,     OpCode32BImm.Create);
             SetA32("<<<<000100101111111111110011xxxx", InstName.Blx,     InstEmit32.Blxr,    OpCode32BReg.Create);
             SetA32("<<<<000100101111111111110001xxxx", InstName.Bx,      InstEmit32.Bx,      OpCode32BReg.Create);
-            SetT32("xxxxxxxxxxxxxxxx010001110xxxx000", InstName.Bx,      InstEmit32.Bx,      OpCodeT16BReg.Create);
             SetA32("11110101011111111111000000011111", InstName.Clrex,   InstEmit32.Clrex,   OpCode32.Create);
             SetA32("<<<<000101101111xxxx11110001xxxx", InstName.Clz,     InstEmit32.Clz,     OpCode32AluReg.Create);
             SetA32("<<<<00110111xxxx0000xxxxxxxxxxxx", InstName.Cmn,     InstEmit32.Cmn,     OpCode32AluImm.Create);
@@ -702,7 +701,6 @@ namespace ARMeilleure.Decoders
             SetA32("<<<<0001101x0000xxxxxxxxxxx0xxxx", InstName.Mov,     InstEmit32.Mov,     OpCode32AluRsImm.Create);
             SetA32("<<<<0001101x0000xxxxxxxx0xx1xxxx", InstName.Mov,     InstEmit32.Mov,     OpCode32AluRsReg.Create);
             SetA32("<<<<00110000xxxxxxxxxxxxxxxxxxxx", InstName.Mov,     InstEmit32.Mov,     OpCode32AluImm16.Create);
-            SetT32("xxxxxxxxxxxxxxxx00100xxxxxxxxxxx", InstName.Mov,     InstEmit32.Mov,     OpCodeT16AluImm8.Create);
             SetA32("<<<<00110100xxxxxxxxxxxxxxxxxxxx", InstName.Movt,    InstEmit32.Movt,    OpCode32AluImm16.Create);
             SetA32("<<<<1110xxx1xxxxxxxx111xxxx1xxxx", InstName.Mrc,     InstEmit32.Mrc,     OpCode32System.Create);
             SetA32("<<<<11000101xxxxxxxx111xxxxxxxxx", InstName.Mrrc,    InstEmit32.Mrrc,    OpCode32System.Create);
@@ -975,12 +973,150 @@ namespace ARMeilleure.Decoders
             SetA32("111100111x11<<10xxxx00011xx0xxxx", InstName.Vzip,     InstEmit32.Vzip,     OpCode32SimdCmpZ.Create);
 #endregion
 
-            FillFastLookupTable(InstA32FastLookup, AllInstA32);
-            FillFastLookupTable(InstT32FastLookup, AllInstT32);
-            FillFastLookupTable(InstA64FastLookup, AllInstA64);
+#region "OpCode Table (AArch32, T16)"
+            SetT16("000<<xxxxxxxxxxx", InstName.Mov,    InstEmit32.Mov,     OpCodeT16ShiftImm.Create);
+            SetT16("0001100xxxxxxxxx", InstName.Add,    InstEmit32.Add,     OpCodeT16AddSubReg.Create);
+            SetT16("0001101xxxxxxxxx", InstName.Sub,    InstEmit32.Sub,     OpCodeT16AddSubReg.Create);
+            SetT16("0001110xxxxxxxxx", InstName.Add,    InstEmit32.Add,     OpCodeT16AddSubImm3.Create);
+            SetT16("0001111xxxxxxxxx", InstName.Sub,    InstEmit32.Sub,     OpCodeT16AddSubImm3.Create);
+            SetT16("00100xxxxxxxxxxx", InstName.Mov,    InstEmit32.Mov,     OpCodeT16AluImm8.Create);
+            SetT16("00101xxxxxxxxxxx", InstName.Cmp,    InstEmit32.Cmp,     OpCodeT16AluImm8.Create);
+            SetT16("00110xxxxxxxxxxx", InstName.Add,    InstEmit32.Add,     OpCodeT16AluImm8.Create);
+            SetT16("00111xxxxxxxxxxx", InstName.Sub,    InstEmit32.Sub,     OpCodeT16AluImm8.Create);
+            SetT16("0100000000xxxxxx", InstName.And,    InstEmit32.And,     OpCodeT16AluRegLow.Create);
+            SetT16("0100000001xxxxxx", InstName.Eor,    InstEmit32.Eor,     OpCodeT16AluRegLow.Create);
+            SetT16("0100000010xxxxxx", InstName.Mov,    InstEmit32.Mov,     OpCodeT16ShiftReg.Create);
+            SetT16("0100000011xxxxxx", InstName.Mov,    InstEmit32.Mov,     OpCodeT16ShiftReg.Create);
+            SetT16("0100000100xxxxxx", InstName.Mov,    InstEmit32.Mov,     OpCodeT16ShiftReg.Create);
+            SetT16("0100000101xxxxxx", InstName.Adc,    InstEmit32.Adc,     OpCodeT16AluRegLow.Create);
+            SetT16("0100000110xxxxxx", InstName.Sbc,    InstEmit32.Sbc,     OpCodeT16AluRegLow.Create);
+            SetT16("0100000111xxxxxx", InstName.Mov,    InstEmit32.Mov,     OpCodeT16ShiftReg.Create);
+            SetT16("0100001000xxxxxx", InstName.Tst,    InstEmit32.Tst,     OpCodeT16AluRegLow.Create);
+            SetT16("0100001001xxxxxx", InstName.Rsb,    InstEmit32.Rsb,     OpCodeT16AluImmZero.Create);
+            SetT16("0100001010xxxxxx", InstName.Cmp,    InstEmit32.Cmp,     OpCodeT16AluRegLow.Create);
+            SetT16("0100001011xxxxxx", InstName.Cmn,    InstEmit32.Cmn,     OpCodeT16AluRegLow.Create);
+            SetT16("0100001100xxxxxx", InstName.Orr,    InstEmit32.Orr,     OpCodeT16AluRegLow.Create);
+            SetT16("0100001101xxxxxx", InstName.Mul,    InstEmit32.Mul,     OpCodeT16AluRegLow.Create);
+            SetT16("0100001110xxxxxx", InstName.Bic,    InstEmit32.Bic,     OpCodeT16AluRegLow.Create);
+            SetT16("0100001111xxxxxx", InstName.Mvn,    InstEmit32.Mvn,     OpCodeT16AluRegLow.Create);
+            SetT16("01000100xxxxxxxx", InstName.Add,    InstEmit32.Add,     OpCodeT16AluRegHigh.Create);
+            SetT16("01000101xxxxxxxx", InstName.Cmp,    InstEmit32.Cmp,     OpCodeT16AluRegHigh.Create);
+            SetT16("01000110xxxxxxxx", InstName.Mov,    InstEmit32.Mov,     OpCodeT16AluRegHigh.Create);
+            SetT16("010001110xxxx000", InstName.Bx,     InstEmit32.Bx,      OpCodeT16BReg.Create);
+            SetT16("010001111xxxx000", InstName.Blx,    InstEmit32.Blx,     OpCodeT16BReg.Create);
+            SetT16("01001xxxxxxxxxxx", InstName.Ldr,    InstEmit32.Ldr,     OpCodeT16MemLit.Create);
+            SetT16("0101000xxxxxxxxx", InstName.Str,    InstEmit32.Str,     OpCodeT16MemReg.Create);
+            SetT16("0101001xxxxxxxxx", InstName.Strh,   InstEmit32.Strh,    OpCodeT16MemReg.Create);
+            SetT16("0101010xxxxxxxxx", InstName.Strb,   InstEmit32.Strb,    OpCodeT16MemReg.Create);
+            SetT16("0101011xxxxxxxxx", InstName.Ldrsb,  InstEmit32.Ldrsb,   OpCodeT16MemReg.Create);
+            SetT16("0101100xxxxxxxxx", InstName.Ldr,    InstEmit32.Ldr,     OpCodeT16MemReg.Create);
+            SetT16("0101101xxxxxxxxx", InstName.Ldrh,   InstEmit32.Ldrh,    OpCodeT16MemReg.Create);
+            SetT16("0101110xxxxxxxxx", InstName.Ldrb,   InstEmit32.Ldrb,    OpCodeT16MemReg.Create);
+            SetT16("0101111xxxxxxxxx", InstName.Ldrsh,  InstEmit32.Ldrsh,   OpCodeT16MemReg.Create);
+            SetT16("01100xxxxxxxxxxx", InstName.Str,    InstEmit32.Str,     OpCodeT16MemImm5.Create);
+            SetT16("01101xxxxxxxxxxx", InstName.Ldr,    InstEmit32.Ldr,     OpCodeT16MemImm5.Create);
+            SetT16("01110xxxxxxxxxxx", InstName.Strb,   InstEmit32.Strb,    OpCodeT16MemImm5.Create);
+            SetT16("01111xxxxxxxxxxx", InstName.Ldrb,   InstEmit32.Ldrb,    OpCodeT16MemImm5.Create);
+            SetT16("10000xxxxxxxxxxx", InstName.Strh,   InstEmit32.Strh,    OpCodeT16MemImm5.Create);
+            SetT16("10001xxxxxxxxxxx", InstName.Ldrh,   InstEmit32.Ldrh,    OpCodeT16MemImm5.Create);
+            SetT16("10010xxxxxxxxxxx", InstName.Str,    InstEmit32.Str,     OpCodeT16MemSp.Create);
+            SetT16("10011xxxxxxxxxxx", InstName.Ldr,    InstEmit32.Ldr,     OpCodeT16MemSp.Create);
+            SetT16("10100xxxxxxxxxxx", InstName.Adr,    InstEmit32.Adr,     OpCodeT16Adr.Create);
+            SetT16("10101xxxxxxxxxxx", InstName.Add,    InstEmit32.Add,     OpCodeT16SpRel.Create);
+            SetT16("101100000xxxxxxx", InstName.Add,    InstEmit32.Add,     OpCodeT16AddSubSp.Create);
+            SetT16("101100001xxxxxxx", InstName.Sub,    InstEmit32.Sub,     OpCodeT16AddSubSp.Create);
+            SetT16("1011001000xxxxxx", InstName.Sxth,   InstEmit32.Sxth,    OpCodeT16AluUx.Create);
+            SetT16("1011001001xxxxxx", InstName.Sxtb,   InstEmit32.Sxtb,    OpCodeT16AluUx.Create);
+            SetT16("1011001010xxxxxx", InstName.Uxth,   InstEmit32.Uxth,    OpCodeT16AluUx.Create);
+            SetT16("1011001011xxxxxx", InstName.Uxtb,   InstEmit32.Uxtb,    OpCodeT16AluUx.Create);
+            SetT16("101100x1xxxxxxxx", InstName.Cbz,    InstEmit32.Cbz,     OpCodeT16BImmCmp.Create);
+            SetT16("1011010xxxxxxxxx", InstName.Push,   InstEmit32.Stm,     OpCodeT16MemStack.Create);
+            SetT16("1011101000xxxxxx", InstName.Rev,    InstEmit32.Rev,     OpCodeT16AluRegLow.Create);
+            SetT16("1011101001xxxxxx", InstName.Rev16,  InstEmit32.Rev16,   OpCodeT16AluRegLow.Create);
+            SetT16("1011101011xxxxxx", InstName.Revsh,  InstEmit32.Revsh,   OpCodeT16AluRegLow.Create);
+            SetT16("101110x1xxxxxxxx", InstName.Cbnz,   InstEmit32.Cbnz,    OpCodeT16BImmCmp.Create);
+            SetT16("1011110xxxxxxxxx", InstName.Pop,    InstEmit32.Ldm,     OpCodeT16MemStack.Create);
+            SetT16("10111111xxxx0000", InstName.Nop,    InstEmit32.Nop,     OpCodeT16.Create);
+            SetT16("10111111xxxx>>>>", InstName.It,     InstEmit32.It,      OpCodeT16IfThen.Create);
+            SetT16("11000xxxxxxxxxxx", InstName.Stm,    InstEmit32.Stm,     OpCodeT16MemMult.Create);
+            SetT16("11001xxxxxxxxxxx", InstName.Ldm,    InstEmit32.Ldm,     OpCodeT16MemMult.Create);
+            SetT16("1101<<<xxxxxxxxx", InstName.B,      InstEmit32.B,       OpCodeT16BImm8.Create);
+            SetT16("11011111xxxxxxxx", InstName.Svc,    InstEmit32.Svc,     OpCodeT16Exception.Create);
+            SetT16("11100xxxxxxxxxxx", InstName.B,      InstEmit32.B,       OpCodeT16BImm11.Create);
+#endregion
+
+#region "OpCode Table (AArch32, T32)"
+            // Base
+            SetT32("11101011010xxxxx0xxxxxxxxxxxxxxx", InstName.Adc,      InstEmit32.Adc,      OpCodeT32AluRsImm.Create);
+            SetT32("11110x01010xxxxx0xxxxxxxxxxxxxxx", InstName.Adc,      InstEmit32.Adc,      OpCodeT32AluImm.Create);
+            SetT32("11101011000<xxxx0xxx<<<<xxxxxxxx", InstName.Add,      InstEmit32.Add,      OpCodeT32AluRsImm.Create);
+            SetT32("11110x01000<xxxx0xxx<<<<xxxxxxxx", InstName.Add,      InstEmit32.Add,      OpCodeT32AluImm.Create);
+            SetT32("11101010000<xxxx0xxx<<<<xxxxxxxx", InstName.And,      InstEmit32.And,      OpCodeT32AluRsImm.Create);
+            SetT32("11110x00000<xxxx0xxx<<<<xxxxxxxx", InstName.And,      InstEmit32.And,      OpCodeT32AluImm.Create);
+            SetT32("11110x<<<xxxxxxx10x0xxxxxxxxxxxx", InstName.B,        InstEmit32.B,        OpCodeT32BImm20.Create);
+            SetT32("11110xxxxxxxxxxx10x1xxxxxxxxxxxx", InstName.B,        InstEmit32.B,        OpCodeT32BImm24.Create);
+            SetT32("11101010001xxxxx0xxxxxxxxxxxxxxx", InstName.Bic,      InstEmit32.Bic,      OpCodeT32AluRsImm.Create);
+            SetT32("11110x00001xxxxx0xxxxxxxxxxxxxxx", InstName.Bic,      InstEmit32.Bic,      OpCodeT32AluImm.Create);
+            SetT32("11110xxxxxxxxxxx11x1xxxxxxxxxxxx", InstName.Bl,       InstEmit32.Bl,       OpCodeT32BImm24.Create);
+            SetT32("11110xxxxxxxxxxx11x0xxxxxxxxxxx0", InstName.Blx,      InstEmit32.Blx,      OpCodeT32BImm24.Create);
+            SetT32("111010110001xxxx0xxx1111xxxxxxxx", InstName.Cmn,      InstEmit32.Cmn,      OpCodeT32AluRsImm.Create);
+            SetT32("11110x010001xxxx0xxx1111xxxxxxxx", InstName.Cmn,      InstEmit32.Cmn,      OpCodeT32AluImm.Create);
+            SetT32("111010111011xxxx0xxx1111xxxxxxxx", InstName.Cmp,      InstEmit32.Cmp,      OpCodeT32AluRsImm.Create);
+            SetT32("11110x011011xxxx0xxx1111xxxxxxxx", InstName.Cmp,      InstEmit32.Cmp,      OpCodeT32AluImm.Create);
+            SetT32("11101010100<xxxx0xxx<<<<xxxxxxxx", InstName.Eor,      InstEmit32.Eor,      OpCodeT32AluRsImm.Create);
+            SetT32("11110x00100<xxxx0xxx<<<<xxxxxxxx", InstName.Eor,      InstEmit32.Eor,      OpCodeT32AluImm.Create);
+            SetT32("111110000101xxxx<<<<10x1xxxxxxxx", InstName.Ldr,      InstEmit32.Ldr,      OpCodeT32MemImm8.Create);
+            SetT32("111110000101xxxx<<<<1100xxxxxxxx", InstName.Ldr,      InstEmit32.Ldr,      OpCodeT32MemImm8.Create);
+            SetT32("111110000101xxxx<<<<11x1xxxxxxxx", InstName.Ldr,      InstEmit32.Ldr,      OpCodeT32MemImm8.Create);
+            SetT32("111110001101xxxxxxxxxxxxxxxxxxxx", InstName.Ldr,      InstEmit32.Ldr,      OpCodeT32MemImm12.Create);
+            SetT32("111110000001xxxx<<<<10x1xxxxxxxx", InstName.Ldrb,     InstEmit32.Ldrb,     OpCodeT32MemImm8.Create);
+            SetT32("111110000001xxxx<<<<1100xxxxxxxx", InstName.Ldrb,     InstEmit32.Ldrb,     OpCodeT32MemImm8.Create);
+            SetT32("111110000001xxxx<<<<11x1xxxxxxxx", InstName.Ldrb,     InstEmit32.Ldrb,     OpCodeT32MemImm8.Create);
+            SetT32("111110001001xxxxxxxxxxxxxxxxxxxx", InstName.Ldrb,     InstEmit32.Ldrb,     OpCodeT32MemImm12.Create);
+            SetT32("111110000011xxxx<<<<10x1xxxxxxxx", InstName.Ldrh,     InstEmit32.Ldrh,     OpCodeT32MemImm8.Create);
+            SetT32("111110000011xxxx<<<<1100xxxxxxxx", InstName.Ldrh,     InstEmit32.Ldrh,     OpCodeT32MemImm8.Create);
+            SetT32("111110000011xxxx<<<<11x1xxxxxxxx", InstName.Ldrh,     InstEmit32.Ldrh,     OpCodeT32MemImm8.Create);
+            SetT32("111110001011xxxxxxxxxxxxxxxxxxxx", InstName.Ldrh,     InstEmit32.Ldrh,     OpCodeT32MemImm12.Create);
+            SetT32("111110010001xxxx<<<<10x1xxxxxxxx", InstName.Ldrsb,    InstEmit32.Ldrsb,    OpCodeT32MemImm8.Create);
+            SetT32("111110010001xxxx<<<<1100xxxxxxxx", InstName.Ldrsb,    InstEmit32.Ldrsb,    OpCodeT32MemImm8.Create);
+            SetT32("111110010001xxxx<<<<11x1xxxxxxxx", InstName.Ldrsb,    InstEmit32.Ldrsb,    OpCodeT32MemImm8.Create);
+            SetT32("111110011001xxxxxxxxxxxxxxxxxxxx", InstName.Ldrsb,    InstEmit32.Ldrsb,    OpCodeT32MemImm12.Create);
+            SetT32("111110010011xxxx<<<<10x1xxxxxxxx", InstName.Ldrsh,    InstEmit32.Ldrsh,    OpCodeT32MemImm8.Create);
+            SetT32("111110010011xxxx<<<<1100xxxxxxxx", InstName.Ldrsh,    InstEmit32.Ldrsh,    OpCodeT32MemImm8.Create);
+            SetT32("111110010011xxxx<<<<11x1xxxxxxxx", InstName.Ldrsh,    InstEmit32.Ldrsh,    OpCodeT32MemImm8.Create);
+            SetT32("111110011011xxxxxxxxxxxxxxxxxxxx", InstName.Ldrsh,    InstEmit32.Ldrsh,    OpCodeT32MemImm12.Create);
+            SetT32("11101010010x11110xxxxxxxxxxxxxxx", InstName.Mov,      InstEmit32.Mov,      OpCodeT32AluRsImm.Create);
+            SetT32("11110x00010x11110xxxxxxxxxxxxxxx", InstName.Mov,      InstEmit32.Mov,      OpCodeT32AluImm.Create);
+            SetT32("11101010011x11110xxxxxxxxxxxxxxx", InstName.Mvn,      InstEmit32.Mvn,      OpCodeT32AluRsImm.Create);
+            SetT32("11110x00011x11110xxxxxxxxxxxxxxx", InstName.Mvn,      InstEmit32.Mvn,      OpCodeT32AluImm.Create);
+            SetT32("11101010011x<<<<0xxxxxxxxxxxxxxx", InstName.Orn,      InstEmit32.Orn,      OpCodeT32AluRsImm.Create);
+            SetT32("11110x00011x<<<<0xxxxxxxxxxxxxxx", InstName.Orn,      InstEmit32.Orn,      OpCodeT32AluImm.Create);
+            SetT32("11101010010x<<<<0xxxxxxxxxxxxxxx", InstName.Orr,      InstEmit32.Orr,      OpCodeT32AluRsImm.Create);
+            SetT32("11110x00010x<<<<0xxxxxxxxxxxxxxx", InstName.Orr,      InstEmit32.Orr,      OpCodeT32AluImm.Create);
+            SetT32("11101011110xxxxx0xxxxxxxxxxxxxxx", InstName.Rsb,      InstEmit32.Rsb,      OpCodeT32AluRsImm.Create);
+            SetT32("11110x01110xxxxx0xxxxxxxxxxxxxxx", InstName.Rsb,      InstEmit32.Rsb,      OpCodeT32AluImm.Create);
+            SetT32("11101011011xxxxx0xxxxxxxxxxxxxxx", InstName.Sbc,      InstEmit32.Sbc,      OpCodeT32AluRsImm.Create);
+            SetT32("11110x01011xxxxx0xxxxxxxxxxxxxxx", InstName.Sbc,      InstEmit32.Sbc,      OpCodeT32AluImm.Create);
+            SetT32("111110000100xxxxxxxx1<<>xxxxxxxx", InstName.Str,      InstEmit32.Str,      OpCodeT32MemImm8.Create);
+            SetT32("111110001100xxxxxxxxxxxxxxxxxxxx", InstName.Str,      InstEmit32.Str,      OpCodeT32MemImm12.Create);
+            SetT32("111110000000xxxxxxxx1<<>xxxxxxxx", InstName.Strb,     InstEmit32.Strb,     OpCodeT32MemImm8.Create);
+            SetT32("111110001000xxxxxxxxxxxxxxxxxxxx", InstName.Strb,     InstEmit32.Strb,     OpCodeT32MemImm12.Create);
+            SetT32("111110000010xxxxxxxx1<<>xxxxxxxx", InstName.Strh,     InstEmit32.Strh,     OpCodeT32MemImm8.Create);
+            SetT32("111110001010xxxxxxxxxxxxxxxxxxxx", InstName.Strh,     InstEmit32.Strh,     OpCodeT32MemImm12.Create);
+            SetT32("11101011101<xxxx0xxx<<<<xxxxxxxx", InstName.Sub,      InstEmit32.Sub,      OpCodeT32AluRsImm.Create);
+            SetT32("11110x01101<xxxx0xxx<<<<xxxxxxxx", InstName.Sub,      InstEmit32.Sub,      OpCodeT32AluImm.Create);
+            SetT32("111010101001xxxx0xxx1111xxxxxxxx", InstName.Teq,      InstEmit32.Teq,      OpCodeT32AluRsImm.Create);
+            SetT32("11110x001001xxxx0xxx1111xxxxxxxx", InstName.Teq,      InstEmit32.Teq,      OpCodeT32AluImm.Create);
+            SetT32("111010100001xxxx0xxx1111xxxxxxxx", InstName.Tst,      InstEmit32.Tst,      OpCodeT32AluRsImm.Create);
+            SetT32("11110x000001xxxx0xxx1111xxxxxxxx", InstName.Tst,      InstEmit32.Tst,      OpCodeT32AluImm.Create);
+#endregion
+
+            FillFastLookupTable(InstA32FastLookup, AllInstA32, ToFastLookupIndexA);
+            FillFastLookupTable(InstT32FastLookup, AllInstT32, ToFastLookupIndexT);
+            FillFastLookupTable(InstA64FastLookup, AllInstA64, ToFastLookupIndexA);
         }
 
-        private static void FillFastLookupTable(InstInfo[][] table, List<InstInfo> allInsts)
+        private static void FillFastLookupTable(InstInfo[][] table, List<InstInfo> allInsts, Func<int, int> ToFastLookupIndex)
         {
             List<InstInfo>[] temp = new List<InstInfo>[FastLookupSize];
 
@@ -1011,20 +1147,30 @@ namespace ARMeilleure.Decoders
 
         private static void SetA32(string encoding, InstName name, InstEmitter emitter, MakeOp makeOp)
         {
-            Set(encoding, ExecutionMode.Aarch32Arm, new InstDescriptor(name, emitter), makeOp);
+            Set(encoding, AllInstA32, new InstDescriptor(name, emitter), makeOp);
+        }
+
+        private static void SetT16(string encoding, InstName name, InstEmitter emitter, MakeOp makeOp)
+        {
+            encoding = "xxxxxxxxxxxxxxxx" + encoding;
+            Set(encoding, AllInstT32, new InstDescriptor(name, emitter), makeOp);
         }
 
         private static void SetT32(string encoding, InstName name, InstEmitter emitter, MakeOp makeOp)
         {
-            Set(encoding, ExecutionMode.Aarch32Thumb, new InstDescriptor(name, emitter), makeOp);
+            string reversedEncoding = encoding.Substring(16) + encoding.Substring(0, 16);
+            MakeOp reversedMakeOp =
+                (InstDescriptor inst, ulong address, int opCode)
+                    => makeOp(inst, address, (int)BitOperations.RotateRight((uint)opCode, 16));
+            Set(reversedEncoding, AllInstT32, new InstDescriptor(name, emitter), reversedMakeOp);
         }
 
         private static void SetA64(string encoding, InstName name, InstEmitter emitter, MakeOp makeOp)
         {
-            Set(encoding, ExecutionMode.Aarch64, new InstDescriptor(name, emitter), makeOp);
+            Set(encoding, AllInstA64, new InstDescriptor(name, emitter), makeOp);
         }
 
-        private static void Set(string encoding, ExecutionMode mode, InstDescriptor inst, MakeOp makeOp)
+        private static void Set(string encoding, List<InstInfo> list, InstDescriptor inst, MakeOp makeOp)
         {
             int bit   = encoding.Length - 1;
             int value = 0;
@@ -1073,7 +1219,7 @@ namespace ARMeilleure.Decoders
 
             if (xBits == 0)
             {
-                InsertInst(new InstInfo(xMask, value, inst, makeOp), mode);
+                list.Add(new InstInfo(xMask, value, inst, makeOp));
 
                 return;
             }
@@ -1089,34 +1235,24 @@ namespace ARMeilleure.Decoders
 
                 if (mask != blacklisted)
                 {
-                    InsertInst(new InstInfo(xMask, value | mask, inst, makeOp), mode);
+                    list.Add(new InstInfo(xMask, value | mask, inst, makeOp));
                 }
             }
         }
 
-        private static void InsertInst(InstInfo info, ExecutionMode mode)
-        {
-            switch (mode)
-            {
-                case ExecutionMode.Aarch32Arm:   AllInstA32.Add(info); break;
-                case ExecutionMode.Aarch32Thumb: AllInstT32.Add(info); break;
-                case ExecutionMode.Aarch64:      AllInstA64.Add(info); break;
-            }
-        }
-
         public static (InstDescriptor inst, MakeOp makeOp) GetInstA32(int opCode)
         {
-            return GetInstFromList(InstA32FastLookup[ToFastLookupIndex(opCode)], opCode);
+            return GetInstFromList(InstA32FastLookup[ToFastLookupIndexA(opCode)], opCode);
         }
 
         public static (InstDescriptor inst, MakeOp makeOp) GetInstT32(int opCode)
         {
-            return GetInstFromList(InstT32FastLookup[ToFastLookupIndex(opCode)], opCode);
+            return GetInstFromList(InstT32FastLookup[ToFastLookupIndexT(opCode)], opCode);
         }
 
         public static (InstDescriptor inst, MakeOp makeOp) GetInstA64(int opCode)
         {
-            return GetInstFromList(InstA64FastLookup[ToFastLookupIndex(opCode)], opCode);
+            return GetInstFromList(InstA64FastLookup[ToFastLookupIndexA(opCode)], opCode);
         }
 
         private static (InstDescriptor inst, MakeOp makeOp) GetInstFromList(InstInfo[] insts, int opCode)
@@ -1132,9 +1268,14 @@ namespace ARMeilleure.Decoders
             return (new InstDescriptor(InstName.Und, InstEmit.Und), null);
         }
 
-        private static int ToFastLookupIndex(int value)
+        private static int ToFastLookupIndexA(int value)
         {
             return ((value >> 10) & 0x00F) | ((value >> 18) & 0xFF0);
         }
+
+        private static int ToFastLookupIndexT(int value)
+        {
+            return (value >> 4) & 0xFFF;
+        }
     }
 }

ARMeilleure/Instructions/InstEmitAlu32.cs

@@ -20,7 +20,7 @@ namespace ARMeilleure.Instructions
 
             Operand res = context.Add(n, m);
 
-            if (op.SetFlags)
+            if (ShouldSetFlags(context))
             {
                 EmitNZFlagsCheck(context, res);
 
@@ -44,7 +44,7 @@ namespace ARMeilleure.Instructions
 
             res = context.Add(res, carry);
 
-            if (op.SetFlags)
+            if (ShouldSetFlags(context))
             {
                 EmitNZFlagsCheck(context, res);
 
@@ -64,7 +64,7 @@ namespace ARMeilleure.Instructions
 
             Operand res = context.BitwiseAnd(n, m);
 
-            if (op.SetFlags)
+            if (ShouldSetFlags(context))
             {
                 EmitNZFlagsCheck(context, res);
             }
@@ -110,7 +110,7 @@ namespace ARMeilleure.Instructions
 
             Operand res = context.BitwiseAnd(n, context.BitwiseNot(m));
 
-            if (op.SetFlags)
+            if (ShouldSetFlags(context))
             {
                 EmitNZFlagsCheck(context, res);
             }
@@ -161,7 +161,7 @@ namespace ARMeilleure.Instructions
 
             Operand res = context.BitwiseExclusiveOr(n, m);
 
-            if (op.SetFlags)
+            if (ShouldSetFlags(context))
             {
                 EmitNZFlagsCheck(context, res);
             }
@@ -175,7 +175,7 @@ namespace ARMeilleure.Instructions
 
             Operand m = GetAluM(context);
 
-            if (op.SetFlags)
+            if (ShouldSetFlags(context))
             {
                 EmitNZFlagsCheck(context, m);
             }
@@ -204,7 +204,7 @@ namespace ARMeilleure.Instructions
 
             Operand res = context.Multiply(n, m);
 
-            if (op.SetFlags)
+            if (ShouldSetFlags(context))
             {
                 EmitNZFlagsCheck(context, res);
             }
@@ -219,7 +219,7 @@ namespace ARMeilleure.Instructions
 
             Operand res = context.BitwiseNot(m);
 
-            if (op.SetFlags)
+            if (ShouldSetFlags(context))
             {
                 EmitNZFlagsCheck(context, res);
             }
@@ -236,7 +236,24 @@ namespace ARMeilleure.Instructions
 
             Operand res = context.BitwiseOr(n, m);
 
-            if (op.SetFlags)
+            if (ShouldSetFlags(context))
+            {
+                EmitNZFlagsCheck(context, res);
+            }
+
+            EmitAluStore(context, res);
+        }
+
+        public static void Orn(ArmEmitterContext context)
+        {
+            IOpCode32Alu op = (IOpCode32Alu)context.CurrOp;
+
+            Operand n = GetAluN(context);
+            Operand m = GetAluM(context);
+
+            Operand res = context.BitwiseOr(n, context.BitwiseNot(m));
+
+            if (ShouldSetFlags(context))
             {
                 EmitNZFlagsCheck(context, res);
             }
@@ -315,7 +332,7 @@ namespace ARMeilleure.Instructions
 
             res = context.Subtract(res, borrow);
 
-            if (op.SetFlags)
+            if (ShouldSetFlags(context))
             {
                 EmitNZFlagsCheck(context, res);
 
@@ -335,7 +352,7 @@ namespace ARMeilleure.Instructions
 
             Operand res = context.Subtract(m, n);
 
-            if (op.SetFlags)
+            if (ShouldSetFlags(context))
             {
                 EmitNZFlagsCheck(context, res);
 
@@ -359,7 +376,7 @@ namespace ARMeilleure.Instructions
 
             res = context.Subtract(res, borrow);
 
-            if (op.SetFlags)
+            if (ShouldSetFlags(context))
             {
                 EmitNZFlagsCheck(context, res);
 
@@ -420,7 +437,7 @@ namespace ARMeilleure.Instructions
 
             Operand res = context.Subtract(n, m);
 
-            if (op.SetFlags)
+            if (ShouldSetFlags(context))
             {
                 EmitNZFlagsCheck(context, res);
 
@@ -836,7 +853,7 @@ namespace ARMeilleure.Instructions
         {
             IOpCode32Alu op = (IOpCode32Alu)context.CurrOp;
 
-            EmitGenericAluStoreA32(context, op.Rd, op.SetFlags, value);
+            EmitGenericAluStoreA32(context, op.Rd, ShouldSetFlags(context), value);
         }
     }
 }

ARMeilleure/Instructions/InstEmitAluHelper.cs

@@ -12,6 +12,18 @@ namespace ARMeilleure.Instructions
 {
     static class InstEmitAluHelper
     {
+        public static bool ShouldSetFlags(ArmEmitterContext context)
+        {
+            IOpCode32HasSetFlags op = (IOpCode32HasSetFlags)context.CurrOp;
+
+            if (op.SetFlags == null)
+            {
+                return !context.IsInIfThenBlock;
+            }
+
+            return op.SetFlags.Value;
+        }
+
         public static void EmitNZFlagsCheck(ArmEmitterContext context, Operand d)
         {
             SetFlag(context, PState.NFlag, context.ICompareLess (d, Const(d.Type, 0)));
@@ -116,7 +128,7 @@ namespace ARMeilleure.Instructions
         {
             Debug.Assert(value.Type == OperandType.I32);
 
-            if (IsThumb(context.CurrOp))
+            if (((OpCode32)context.CurrOp).IsThumb())
             {
                 bool isReturn = IsA32Return(context);
                 if (!isReturn)
@@ -183,9 +195,9 @@ namespace ARMeilleure.Instructions
             switch (context.CurrOp)
             {
                 // ARM32.
-                case OpCode32AluImm op:
+                case IOpCode32AluImm op:
                 {
-                    if (op.SetFlags && op.IsRotated)
+                    if (ShouldSetFlags(context) && op.IsRotated && setCarry)
                     {
                         SetFlag(context, PState.CFlag, Const((uint)op.Immediate >> 31));
                     }
@@ -195,10 +207,8 @@ namespace ARMeilleure.Instructions
 
                 case OpCode32AluImm16 op: return Const(op.Immediate);
 
-                case OpCode32AluRsImm op: return GetMShiftedByImmediate(context, op, setCarry);
-                case OpCode32AluRsReg op: return GetMShiftedByReg(context, op, setCarry);
-
-                case OpCodeT16AluImm8 op: return Const(op.Immediate);
+                case IOpCode32AluRsImm op: return GetMShiftedByImmediate(context, op, setCarry);
+                case IOpCode32AluRsReg op: return GetMShiftedByReg(context, op, setCarry);
 
                 case IOpCode32AluReg op: return GetIntA32(context, op.Rm);
 
@@ -249,7 +259,7 @@ namespace ARMeilleure.Instructions
         }
 
         // ARM32 helpers.
-        public static Operand GetMShiftedByImmediate(ArmEmitterContext context, OpCode32AluRsImm op, bool setCarry)
+        public static Operand GetMShiftedByImmediate(ArmEmitterContext context, IOpCode32AluRsImm op, bool setCarry)
         {
             Operand m = GetIntA32(context, op.Rm);
 
@@ -267,7 +277,7 @@ namespace ARMeilleure.Instructions
 
             if (shift != 0)
             {
-                setCarry &= op.SetFlags;
+                setCarry &= ShouldSetFlags(context);
 
                 switch (op.ShiftType)
                 {
@@ -305,7 +315,7 @@ namespace ARMeilleure.Instructions
             return shift;
         }
 
-        public static Operand GetMShiftedByReg(ArmEmitterContext context, OpCode32AluRsReg op, bool setCarry)
+        public static Operand GetMShiftedByReg(ArmEmitterContext context, IOpCode32AluRsReg op, bool setCarry)
         {
             Operand m = GetIntA32(context, op.Rm);
             Operand s = context.ZeroExtend8(OperandType.I32, GetIntA32(context, op.Rs));
@@ -314,7 +324,7 @@ namespace ARMeilleure.Instructions
             Operand zeroResult = m;
             Operand shiftResult = m;
 
-            setCarry &= op.SetFlags;
+            setCarry &= ShouldSetFlags(context);
 
             switch (op.ShiftType)
             {

ARMeilleure/Instructions/InstEmitException.cs

@@ -9,18 +9,25 @@ namespace ARMeilleure.Instructions
     {
         public static void Brk(ArmEmitterContext context)
         {
-            EmitExceptionCall(context, nameof(NativeInterface.Break));
+            OpCodeException op = (OpCodeException)context.CurrOp;
+
+            string name = nameof(NativeInterface.Break);
+
+            context.StoreToContext();
+
+            context.Call(typeof(NativeInterface).GetMethod(name), Const(op.Address), Const(op.Id));
+
+            context.LoadFromContext();
+
+            context.Return(Const(op.Address));
         }
 
         public static void Svc(ArmEmitterContext context)
-        {
-            EmitExceptionCall(context, nameof(NativeInterface.SupervisorCall));
-        }
-
-        private static void EmitExceptionCall(ArmEmitterContext context, string name)
         {
             OpCodeException op = (OpCodeException)context.CurrOp;
 
+            string name = nameof(NativeInterface.SupervisorCall);
+
             context.StoreToContext();
 
             context.Call(typeof(NativeInterface).GetMethod(name), Const(op.Address), Const(op.Id));
@@ -41,6 +48,8 @@ namespace ARMeilleure.Instructions
             context.Call(typeof(NativeInterface).GetMethod(name), Const(op.Address), Const(op.RawOpCode));
 
             context.LoadFromContext();
+
+            context.Return(Const(op.Address));
         }
     }
 }

ARMeilleure/Instructions/InstEmitException32.cs

@@ -10,25 +10,32 @@ namespace ARMeilleure.Instructions
     {
         public static void Svc(ArmEmitterContext context)
         {
-            EmitExceptionCall(context, nameof(NativeInterface.SupervisorCall));
-        }
+            IOpCode32Exception op = (IOpCode32Exception)context.CurrOp;
 
-        public static void Trap(ArmEmitterContext context)
-        {
-            EmitExceptionCall(context, nameof(NativeInterface.Break));
-        }
-
-        private static void EmitExceptionCall(ArmEmitterContext context, string name)
-        {
-            OpCode32Exception op = (OpCode32Exception)context.CurrOp;
+            string name = nameof(NativeInterface.SupervisorCall);
 
             context.StoreToContext();
 
-            context.Call(typeof(NativeInterface).GetMethod(name), Const(op.Address), Const(op.Id));
+            context.Call(typeof(NativeInterface).GetMethod(name), Const(((IOpCode)op).Address), Const(op.Id));
 
             context.LoadFromContext();
 
             Translator.EmitSynchronization(context);
         }
+
+        public static void Trap(ArmEmitterContext context)
+        {
+            IOpCode32Exception op = (IOpCode32Exception)context.CurrOp;
+
+            string name = nameof(NativeInterface.Break);
+
+            context.StoreToContext();
+
+            context.Call(typeof(NativeInterface).GetMethod(name), Const(((IOpCode)op).Address), Const(op.Id));
+
+            context.LoadFromContext();
+
+            context.Return(Const(context.CurrOp.Address));
+        }
     }
 }

ARMeilleure/Instructions/InstEmitFlow32.cs

@@ -34,7 +34,7 @@ namespace ARMeilleure.Instructions
 
             uint pc = op.GetPc();
 
-            bool isThumb = IsThumb(context.CurrOp);
+            bool isThumb = ((OpCode32)context.CurrOp).IsThumb();
 
             uint currentPc = isThumb
                 ? pc | 1
@@ -61,17 +61,17 @@ namespace ARMeilleure.Instructions
             Operand addr = context.Copy(GetIntA32(context, op.Rm));
             Operand bitOne = context.BitwiseAnd(addr, Const(1));
 
-            bool isThumb = IsThumb(context.CurrOp);
+            bool isThumb = ((OpCode32)context.CurrOp).IsThumb();
 
             uint currentPc = isThumb
-                ? pc | 1
+                ? (pc - 2) | 1
                 : pc - 4;
 
             SetIntA32(context, GetBankedRegisterAlias(context.Mode, RegisterAlias.Aarch32Lr), Const(currentPc));
 
             SetFlag(context, PState.TFlag, bitOne);
 
-            EmitVirtualCall(context, addr);
+            EmitBxWritePc(context, addr);
         }
 
         public static void Bx(ArmEmitterContext context)
@@ -80,5 +80,32 @@ namespace ARMeilleure.Instructions
 
             EmitBxWritePc(context, GetIntA32(context, op.Rm), op.Rm);
         }
+
+        public static void Cbnz(ArmEmitterContext context) => EmitCb(context, onNotZero: true);
+        public static void Cbz(ArmEmitterContext context)  => EmitCb(context, onNotZero: false);
+
+        private static void EmitCb(ArmEmitterContext context, bool onNotZero)
+        {
+            OpCodeT16BImmCmp op = (OpCodeT16BImmCmp)context.CurrOp;
+
+            Operand value = GetIntOrZR(context, op.Rn);
+            Operand lblTarget = context.GetLabel((ulong)op.Immediate);
+
+            if (onNotZero)
+            {
+                context.BranchIfTrue(lblTarget, value);
+            }
+            else
+            {
+                context.BranchIfFalse(lblTarget, value);
+            }
+        }
+
+        public static void It(ArmEmitterContext context)
+        {
+            OpCodeT16IfThen op = (OpCodeT16IfThen)context.CurrOp;
+
+            context.SetIfThenBlockState(op.IfThenBlockConds);
+        }
     }
 }

ARMeilleure/Instructions/InstEmitHelper.cs

@@ -10,11 +10,6 @@ namespace ARMeilleure.Instructions
 {
     static class InstEmitHelper
     {
-        public static bool IsThumb(OpCode op)
-        {
-            return op is OpCodeT16;
-        }
-
         public static Operand GetExtendedM(ArmEmitterContext context, int rm, IntType type)
         {
             Operand value = GetIntOrZR(context, rm);
@@ -186,7 +181,7 @@ namespace ARMeilleure.Instructions
 
             SetFlag(context, PState.TFlag, mode);
 
-            Operand addr = context.ConditionalSelect(mode, pc, context.BitwiseAnd(pc, Const(~3)));
+            Operand addr = context.ConditionalSelect(mode, context.BitwiseAnd(pc, Const(~1)), context.BitwiseAnd(pc, Const(~3)));
 
             InstEmitFlowHelper.EmitVirtualJump(context, addr, isReturn);
         }

ARMeilleure/Instructions/InstEmitMemory32.cs

@@ -32,7 +32,7 @@ namespace ARMeilleure.Instructions
 
         public static void Ldm(ArmEmitterContext context)
         {
-            OpCode32MemMult op = (OpCode32MemMult)context.CurrOp;
+            IOpCode32MemMult op = (IOpCode32MemMult)context.CurrOp;
 
             Operand n = GetIntA32(context, op.Rn);
 
@@ -95,7 +95,7 @@ namespace ARMeilleure.Instructions
 
         public static void Stm(ArmEmitterContext context)
         {
-            OpCode32MemMult op = (OpCode32MemMult)context.CurrOp;
+            IOpCode32MemMult op = (IOpCode32MemMult)context.CurrOp;
 
             Operand n = context.Copy(GetIntA32(context, op.Rn));
 
@@ -151,7 +151,7 @@ namespace ARMeilleure.Instructions
 
         private static void EmitLoadOrStore(ArmEmitterContext context, int size, AccessType accType)
         {
-            OpCode32Mem op = (OpCode32Mem)context.CurrOp;
+            IOpCode32Mem op = (IOpCode32Mem)context.CurrOp;
 
             Operand n = context.Copy(GetIntA32AlignedPC(context, op.Rn));
             Operand m = GetMemM(context, setCarry: false);
@@ -255,5 +255,11 @@ namespace ARMeilleure.Instructions
                 }
             }
         }
+
+        public static void Adr(ArmEmitterContext context)
+        {
+            IOpCode32Adr op = (IOpCode32Adr)context.CurrOp;
+            SetIntA32(context, op.Rd, Const(op.Immediate));
+        }
     }
 }

ARMeilleure/Instructions/InstEmitMemoryEx.cs

@@ -130,11 +130,6 @@ namespace ARMeilleure.Instructions
             bool ordered   = (accType & AccessType.Ordered)   != 0;
             bool exclusive = (accType & AccessType.Exclusive) != 0;
 
-            if (ordered)
-            {
-                EmitBarrier(context);
-            }
-
             Operand address = context.Copy(GetIntOrSP(context, op.Rn));
 
             Operand t = GetIntOrZR(context, op.Rt);
@@ -163,6 +158,11 @@ namespace ARMeilleure.Instructions
             {
                 EmitStoreExclusive(context, address, t, exclusive, op.Size, op.Rs, a32: false);
             }
+
+            if (ordered)
+            {
+                EmitBarrier(context);
+            }
         }
 
         private static void EmitBarrier(ArmEmitterContext context)

ARMeilleure/Instructions/InstEmitMemoryEx32.cs

@@ -146,13 +146,13 @@ namespace ARMeilleure.Instructions
             var exclusive = (accType & AccessType.Exclusive) != 0;
             var ordered = (accType & AccessType.Ordered) != 0;
 
+            if ((accType & AccessType.Load) != 0)
+            {
                 if (ordered)
                 {
                     EmitBarrier(context);
                 }
 
-            if ((accType & AccessType.Load) != 0)
-            {
                 if (size == DWordSizeLog2)
                 {
                     // Keep loads atomic - make the call to get the whole region and then decompose it into parts
@@ -219,6 +219,11 @@ namespace ARMeilleure.Instructions
                     Operand value = context.ZeroExtend32(OperandType.I64, GetIntA32(context, op.Rt));
                     EmitStoreExclusive(context, address, value, exclusive, size, op.Rd, a32: true);
                 }
+
+                if (ordered)
+                {
+                    EmitBarrier(context);
+                }
             }
         }
 

ARMeilleure/Instructions/InstEmitMemoryHelper.cs

@@ -549,9 +549,9 @@ namespace ARMeilleure.Instructions
             {
                 case OpCode32MemRsImm op: return GetMShiftedByImmediate(context, op, setCarry);
 
-                case OpCode32MemReg op: return GetIntA32(context, op.Rm);
+                case IOpCode32MemReg op: return GetIntA32(context, op.Rm);
 
-                case OpCode32Mem op: return Const(op.Immediate);
+                case IOpCode32Mem op: return Const(op.Immediate);
 
                 case OpCode32SimdMemImm op: return Const(op.Immediate);
 

ARMeilleure/Instructions/InstEmitMul32.cs

@@ -33,7 +33,7 @@ namespace ARMeilleure.Instructions
 
             Operand res = context.Add(a, context.Multiply(n, m));
 
-            if (op.SetFlags)
+            if (ShouldSetFlags(context))
             {
                 EmitNZFlagsCheck(context, res);
             }
@@ -250,13 +250,13 @@ namespace ARMeilleure.Instructions
             Operand hi = context.ConvertI64ToI32(context.ShiftRightUI(res, Const(32)));
             Operand lo = context.ConvertI64ToI32(res);
 
-            if (op.SetFlags)
+            if (ShouldSetFlags(context))
             {
                 EmitNZFlagsCheck(context, res);
             }
 
-            EmitGenericAluStoreA32(context, op.RdHi, op.SetFlags, hi);
-            EmitGenericAluStoreA32(context, op.RdLo, op.SetFlags, lo);
+            EmitGenericAluStoreA32(context, op.RdHi, ShouldSetFlags(context), hi);
+            EmitGenericAluStoreA32(context, op.RdLo, ShouldSetFlags(context), lo);
         }
 
         public static void Smulw_(ArmEmitterContext context)
@@ -320,13 +320,13 @@ namespace ARMeilleure.Instructions
             Operand hi = context.ConvertI64ToI32(context.ShiftRightUI(res, Const(32)));
             Operand lo = context.ConvertI64ToI32(res);
 
-            if (op.SetFlags)
+            if (ShouldSetFlags(context))
             {
                 EmitNZFlagsCheck(context, res);
             }
 
-            EmitGenericAluStoreA32(context, op.RdHi, op.SetFlags, hi);
-            EmitGenericAluStoreA32(context, op.RdLo, op.SetFlags, lo);
+            EmitGenericAluStoreA32(context, op.RdHi, ShouldSetFlags(context), hi);
+            EmitGenericAluStoreA32(context, op.RdLo, ShouldSetFlags(context), lo);
         }
 
         private static void EmitMlal(ArmEmitterContext context, bool signed)
@@ -356,13 +356,13 @@ namespace ARMeilleure.Instructions
             Operand hi = context.ConvertI64ToI32(context.ShiftRightUI(res, Const(32)));
             Operand lo = context.ConvertI64ToI32(res);
 
-            if (op.SetFlags)
+            if (ShouldSetFlags(context))
             {
                 EmitNZFlagsCheck(context, res);
             }
 
-            EmitGenericAluStoreA32(context, op.RdHi, op.SetFlags, hi);
-            EmitGenericAluStoreA32(context, op.RdLo, op.SetFlags, lo);
+            EmitGenericAluStoreA32(context, op.RdHi, ShouldSetFlags(context), hi);
+            EmitGenericAluStoreA32(context, op.RdLo, ShouldSetFlags(context), lo);
         }
 
         private static void UpdateQFlag(ArmEmitterContext context, Operand q)

ARMeilleure/Instructions/InstEmitSimdCvt.cs

@@ -105,11 +105,48 @@ namespace ARMeilleure.Instructions
             }
             else if (op.Size == 1 && op.Opc == 3) // Double -> Half.
             {
-                throw new NotImplementedException("Double-precision to half-precision.");
-            }
-            else if (op.Size == 3 && op.Opc == 1) // Double -> Half.
+                if (Optimizations.UseF16c)
                 {
-                throw new NotImplementedException("Half-precision to double-precision.");
+                    Debug.Assert(!Optimizations.ForceLegacySse);
+
+                    Operand n = GetVec(op.Rn);
+
+                    Operand res = context.AddIntrinsic(Intrinsic.X86Cvtsd2ss, context.VectorZero(), n);
+                            res = context.AddIntrinsic(Intrinsic.X86Vcvtps2ph, res, Const(X86GetRoundControl(FPRoundingMode.ToNearest)));
+
+                    context.Copy(GetVec(op.Rd), res);
+                }
+                else
+                {
+                    Operand ne = context.VectorExtract(OperandType.FP64, GetVec(op.Rn), 0);
+
+                    Operand res = context.Call(typeof(SoftFloat64_16).GetMethod(nameof(SoftFloat64_16.FPConvert)), ne);
+
+                    res = context.ZeroExtend16(OperandType.I64, res);
+
+                    context.Copy(GetVec(op.Rd), EmitVectorInsert(context, context.VectorZero(), res, 0, 1));
+                }
+            }
+            else if (op.Size == 3 && op.Opc == 1) // Half -> Double.
+            {
+                if (Optimizations.UseF16c)
+                {
+                    Operand n = GetVec(op.Rn);
+
+                    Operand res = context.AddIntrinsic(Intrinsic.X86Vcvtph2ps, GetVec(op.Rn));
+                            res = context.AddIntrinsic(Intrinsic.X86Cvtss2sd, context.VectorZero(), res);
+                            res = context.VectorZeroUpper64(res);
+
+                    context.Copy(GetVec(op.Rd), res);
+                }
+                else
+                {
+                    Operand ne = EmitVectorExtractZx(context, op.Rn, 0, 1);
+
+                    Operand res = context.Call(typeof(SoftFloat16_64).GetMethod(nameof(SoftFloat16_64.FPConvert)), ne);
+
+                    context.Copy(GetVec(op.Rd), context.VectorInsert(context.VectorZero(), res, 0));
+                }
             }
             else // Invalid encoding.
             {

ARMeilleure/Instructions/InstEmitSystem.cs

@@ -12,7 +12,8 @@ namespace ARMeilleure.Instructions
 {
     static partial class InstEmit
     {
-        private const int DczSizeLog2 = 4;
+        private const int DczSizeLog2 = 4; // Log2 size in words
+        public const int DczSizeInBytes = 4 << DczSizeLog2;
 
         public static void Hint(ArmEmitterContext context)
         {
@@ -38,7 +39,7 @@ namespace ARMeilleure.Instructions
                 case 0b11_011_0100_0100_000: info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.GetFpcr)); break;
                 case 0b11_011_0100_0100_001: info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.GetFpsr)); break;
                 case 0b11_011_1101_0000_010: info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.GetTpidrEl0)); break;
-                case 0b11_011_1101_0000_011: info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.GetTpidr));     break;
+                case 0b11_011_1101_0000_011: info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.GetTpidrroEl0)); break;
                 case 0b11_011_1110_0000_000: info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.GetCntfrqEl0)); break;
                 case 0b11_011_1110_0000_001: info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.GetCntpctEl0)); break;
                 case 0b11_011_1110_0000_010: info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.GetCntvctEl0)); break;
@@ -87,7 +88,7 @@ namespace ARMeilleure.Instructions
                     // DC ZVA
                     Operand t = GetIntOrZR(context, op.Rt);
 
-                    for (long offset = 0; offset < (4 << DczSizeLog2); offset += 8)
+                    for (long offset = 0; offset < DczSizeInBytes; offset += 8)
                     {
                         Operand address = context.Add(t, Const(offset));
 
@@ -100,6 +101,11 @@ namespace ARMeilleure.Instructions
                 // No-op
                 case 0b11_011_0111_1110_001: // DC CIVAC
                     break;
+
+                case 0b11_011_0111_0101_001: // IC IVAU
+                    Operand target = Register(op.Rt, RegisterType.Integer, OperandType.I64);
+                    context.Call(typeof(NativeInterface).GetMethod(nameof(NativeInterface.InvalidateCacheLine)), target);
+                    break;
             }
         }
 

ARMeilleure/Instructions/InstName.cs

@@ -48,6 +48,7 @@ namespace ARMeilleure.Instructions
         Extr,
         Hint,
         Isb,
+        It,
         Ldar,
         Ldaxp,
         Ldaxr,
@@ -512,6 +513,8 @@ namespace ARMeilleure.Instructions
         Mvn,
         Pkh,
         Pld,
+        Pop,
+        Push,
         Rev,
         Revsh,
         Rsb,

ARMeilleure/Instructions/NativeInterface.cs

@@ -107,14 +107,14 @@ namespace ARMeilleure.Instructions
             return (uint)GetContext().TpidrEl0;
         }
 
-        public static ulong GetTpidr()
+        public static ulong GetTpidrroEl0()
         {
-            return (ulong)GetContext().Tpidr;
+            return (ulong)GetContext().TpidrroEl0;
         }
 
         public static uint GetTpidr32()
         {
-            return (uint)GetContext().Tpidr;
+            return (uint)GetContext().TpidrroEl0;
         }
 
         public static ulong GetCntfrqEl0()
@@ -242,6 +242,11 @@ namespace ARMeilleure.Instructions
             return (ulong)function.FuncPtr.ToInt64();
         }
 
+        public static void InvalidateCacheLine(ulong address)
+        {
+            Context.Translator.InvalidateJitCacheRegion(address, InstEmit.DczSizeInBytes);
+        }
+
         public static bool CheckSynchronization()
         {
             Statistics.PauseTimer();

ARMeilleure/IntermediateRepresentation/Operand.cs

@@ -14,10 +14,11 @@ namespace ARMeilleure.IntermediateRepresentation
             public byte Kind;
             public byte Type;
             public byte SymbolType;
+            public byte Padding; // Unused space.
             public ushort AssignmentsCount;
             public ushort AssignmentsCapacity;
-            public ushort UsesCount;
-            public ushort UsesCapacity;
+            public uint UsesCount;
+            public uint UsesCapacity;
             public Operation* Assignments;
             public Operation* Uses;
             public ulong Value;
@@ -84,11 +85,11 @@ namespace ARMeilleure.IntermediateRepresentation
             {
                 Debug.Assert(Kind != OperandKind.Memory);
 
-                return new ReadOnlySpan<Operation>(_data->Uses, _data->UsesCount);
+                return new ReadOnlySpan<Operation>(_data->Uses, (int)_data->UsesCount);
             }
         }
 
-        public int UsesCount => _data->UsesCount;
+        public int UsesCount => (int)_data->UsesCount;
         public int AssignmentsCount => _data->AssignmentsCount;
 
         public bool Relocatable => Symbol.Type != SymbolType.None;
@@ -265,6 +266,13 @@ namespace ARMeilleure.IntermediateRepresentation
             data = Allocators.References.Allocate<T>(initialCapacity);
         }
 
+        private static void New<T>(ref T* data, ref uint count, ref uint capacity, uint initialCapacity) where T : unmanaged
+        {
+            count = 0;
+            capacity = initialCapacity;
+            data = Allocators.References.Allocate<T>(initialCapacity);
+        }
+
         private static void Add<T>(T item, ref T* data, ref ushort count, ref ushort capacity) where T : unmanaged
         {
             if (count < capacity)
@@ -294,6 +302,40 @@ namespace ARMeilleure.IntermediateRepresentation
             }
         }
 
+        private static void Add<T>(T item, ref T* data, ref uint count, ref uint capacity) where T : unmanaged
+        {
+            if (count < capacity)
+            {
+                data[count++] = item;
+
+                return;
+            }
+
+            // Could not add item in the fast path, fallback onto the slow path.
+            ExpandAdd(item, ref data, ref count, ref capacity);
+
+            static void ExpandAdd(T item, ref T* data, ref uint count, ref uint capacity)
+            {
+                uint newCount = checked(count + 1);
+                uint newCapacity = (uint)Math.Min(capacity * 2, int.MaxValue);
+
+                if (newCapacity <= capacity)
+                {
+                    throw new OverflowException();
+                }
+
+                var oldSpan = new Span<T>(data, (int)count);
+
+                capacity = newCapacity;
+                data = Allocators.References.Allocate<T>(capacity);
+
+                oldSpan.CopyTo(new Span<T>(data, (int)count));
+
+                data[count] = item;
+                count = newCount;
+            }
+        }
+
         private static void Remove<T>(in T item, ref T* data, ref ushort count) where T : unmanaged
         {
             var span = new Span<T>(data, count);
@@ -314,6 +356,26 @@ namespace ARMeilleure.IntermediateRepresentation
             }
         }
 
+        private static void Remove<T>(in T item, ref T* data, ref uint count) where T : unmanaged
+        {
+            var span = new Span<T>(data, (int)count);
+
+            for (int i = 0; i < span.Length; i++)
+            {
+                if (EqualityComparer<T>.Default.Equals(span[i], item))
+                {
+                    if (i + 1 < count)
+                    {
+                        span.Slice(i + 1).CopyTo(span.Slice(i));
+                    }
+
+                    count--;
+
+                    return;
+                }
+            }
+        }
+
         public override int GetHashCode()
         {
             if (Kind == OperandKind.LocalVariable)

ARMeilleure/Signal/NativeSignalHandler.cs

@@ -103,7 +103,7 @@ namespace ARMeilleure.Signal
                     // Unix siginfo struct locations.
                     // NOTE: These are incredibly likely to be different between kernel version and architectures.
 
-                    config.StructAddressOffset = 16; // si_addr
+                    config.StructAddressOffset = OperatingSystem.IsMacOS() ? 24 : 16; // si_addr
                     config.StructWriteOffset = 8; // si_code
 
                     _signalHandlerPtr = Marshal.GetFunctionPointerForDelegate(GenerateUnixSignalHandler(_handlerConfig));
@@ -191,7 +191,7 @@ namespace ARMeilleure.Signal
                 // Is the fault address within this tracked region?
                 Operand inRange = context.BitwiseAnd(
                     context.ICompare(faultAddress, rangeAddress, Comparison.GreaterOrEqualUI),
-                    context.ICompare(faultAddress, rangeEndAddress, Comparison.Less)
+                    context.ICompare(faultAddress, rangeEndAddress, Comparison.LessUI)
                     );
 
                 // Only call tracking if in range.

ARMeilleure/Signal/UnixSignalHandlerRegistration.cs

@@ -21,6 +21,7 @@ namespace ARMeilleure.Signal
     static class UnixSignalHandlerRegistration
     {
         private const int SIGSEGV = 11;
+        private const int SIGBUS = 10;
         private const int SA_SIGINFO = 0x00000004;
 
         [DllImport("libc", SetLastError = true)]
@@ -43,7 +44,17 @@ namespace ARMeilleure.Signal
 
             if (result != 0)
             {
-                throw new InvalidOperationException($"Could not register sigaction. Error: {result}");
+                throw new InvalidOperationException($"Could not register SIGSEGV sigaction. Error: {result}");
+            }
+
+            if (OperatingSystem.IsMacOS())
+            {
+                result = sigaction(SIGBUS, ref sig, out SigAction oldb);
+
+                if (result != 0)
+                {
+                    throw new InvalidOperationException($"Could not register SIGBUS sigaction. Error: {result}");
+                }
             }
 
             return old;
@@ -51,7 +62,7 @@ namespace ARMeilleure.Signal
 
         public static bool RestoreExceptionHandler(SigAction oldAction)
         {
-            return sigaction(SIGSEGV, ref oldAction, out SigAction _) == 0;
+            return sigaction(SIGSEGV, ref oldAction, out SigAction _) == 0 && (!OperatingSystem.IsMacOS() || sigaction(SIGBUS, ref oldAction, out SigAction _) == 0);
         }
     }
 }

ARMeilleure/State/ExceptionCallback.cs

@@ -0,0 +1,5 @@
+namespace ARMeilleure.State
+{
+    public delegate void ExceptionCallbackNoArgs(ExecutionContext context);
+    public delegate void ExceptionCallback(ExecutionContext context, ulong address, int id);
+}

ARMeilleure/State/ExecutionContext.cs

@@ -1,6 +1,5 @@
 using ARMeilleure.Memory;
 using System;
-using System.Diagnostics;
 
 namespace ARMeilleure.State
 {
@@ -14,34 +13,28 @@ namespace ARMeilleure.State
 
         private bool _interrupted;
 
-        private static Stopwatch _tickCounter;
+        private readonly ICounter _counter;
 
-        private static double _hostTickFreq;
+        public ulong Pc => _nativeContext.GetPc();
 
         public uint CtrEl0 => 0x8444c004;
         public uint DczidEl0 => 0x00000004;
 
-        public ulong CntfrqEl0 { get; set; }
-        public ulong CntpctEl0
-        {
-            get
-            {
-                double ticks = _tickCounter.ElapsedTicks * _hostTickFreq;
-
-                return (ulong)(ticks * CntfrqEl0);
-            }
-        }
+        public ulong CntfrqEl0 => _counter.Frequency;
+        public ulong CntpctEl0 => _counter.Counter;
 
         // CNTVCT_EL0 = CNTPCT_EL0 - CNTVOFF_EL2
         // Since EL2 isn't implemented, CNTVOFF_EL2 = 0
         public ulong CntvctEl0 => CntpctEl0;
 
-        public static TimeSpan ElapsedTime => _tickCounter.Elapsed;
-        public static long ElapsedTicks => _tickCounter.ElapsedTicks;
-        public static double TickFrequency => _hostTickFreq;
-
         public long TpidrEl0 { get; set; }
-        public long Tpidr    { get; set; }
+        public long TpidrroEl0 { get; set; }
+
+        public uint Pstate
+        {
+            get => _nativeContext.GetPstate();
+            set => _nativeContext.SetPstate(value);
+        }
 
         public FPCR Fpcr { get; set; }
         public FPSR Fpsr { get; set; }
@@ -72,22 +65,25 @@ namespace ARMeilleure.State
             private set => _nativeContext.SetRunning(value);
         }
 
-        public event EventHandler<EventArgs>              Interrupt;
-        public event EventHandler<InstExceptionEventArgs> Break;
-        public event EventHandler<InstExceptionEventArgs> SupervisorCall;
-        public event EventHandler<InstUndefinedEventArgs> Undefined;
+        private readonly ExceptionCallbackNoArgs _interruptCallback;
+        private readonly ExceptionCallback _breakCallback;
+        private readonly ExceptionCallback _supervisorCallback;
+        private readonly ExceptionCallback _undefinedCallback;
 
-        static ExecutionContext()
-        {
-            _hostTickFreq = 1.0 / Stopwatch.Frequency;
-
-            _tickCounter = new Stopwatch();
-            _tickCounter.Start();
-        }
-
-        public ExecutionContext(IJitMemoryAllocator allocator)
+        public ExecutionContext(
+            IJitMemoryAllocator allocator,
+            ICounter counter,
+            ExceptionCallbackNoArgs interruptCallback = null,
+            ExceptionCallback breakCallback = null,
+            ExceptionCallback supervisorCallback = null,
+            ExceptionCallback undefinedCallback = null)
         {
             _nativeContext = new NativeContext(allocator);
+            _counter = counter;
+            _interruptCallback = interruptCallback;
+            _breakCallback = breakCallback;
+            _supervisorCallback = supervisorCallback;
+            _undefinedCallback = undefinedCallback;
 
             Running = true;
 
@@ -112,7 +108,7 @@ namespace ARMeilleure.State
             {
                 _interrupted = false;
 
-                Interrupt?.Invoke(this, EventArgs.Empty);
+                _interruptCallback?.Invoke(this);
             }
 
             _nativeContext.SetCounter(MinCountForCheck);
@@ -125,17 +121,17 @@ namespace ARMeilleure.State
 
         internal void OnBreak(ulong address, int imm)
         {
-            Break?.Invoke(this, new InstExceptionEventArgs(address, imm));
+            _breakCallback?.Invoke(this, address, imm);
         }
 
         internal void OnSupervisorCall(ulong address, int imm)
         {
-            SupervisorCall?.Invoke(this, new InstExceptionEventArgs(address, imm));
+            _supervisorCallback?.Invoke(this, address, imm);
         }
 
         internal void OnUndefined(ulong address, int opCode)
         {
-            Undefined?.Invoke(this, new InstUndefinedEventArgs(address, opCode));
+            _undefinedCallback?.Invoke(this, address, opCode);
         }
 
         public void StopRunning()
@@ -145,16 +141,6 @@ namespace ARMeilleure.State
             _nativeContext.SetCounter(0);
         }
 
-        public static void SuspendCounter()
-        {
-            _tickCounter.Stop();
-        }
-
-        public static void ResumeCounter()
-        {
-            _tickCounter.Start();
-        }
-
         public void Dispose()
         {
             _nativeContext.Dispose();

ARMeilleure/State/ICounter.cs

@@ -0,0 +1,18 @@
+namespace ARMeilleure.State
+{
+    /// <summary>
+    /// CPU Counter interface.
+    /// </summary>
+    public interface ICounter
+    {
+        /// <summary>
+        /// Counter frequency in Hertz.
+        /// </summary>
+        ulong Frequency { get; }
+
+        /// <summary>
+        /// Current counter value.
+        /// </summary>
+        ulong Counter { get; }
+    }
+}

ARMeilleure/State/InstExceptionEventArgs.cs

@@ -1,16 +0,0 @@
-using System;
-
-namespace ARMeilleure.State
-{
-    public class InstExceptionEventArgs : EventArgs
-    {
-        public ulong Address { get; }
-        public int   Id      { get; }
-
-        public InstExceptionEventArgs(ulong address, int id)
-        {
-            Address = address;
-            Id      = id;
-        }
-    }
-}

ARMeilleure/State/InstUndefinedEventArgs.cs

@@ -1,16 +0,0 @@
-using System;
-
-namespace ARMeilleure.State
-{
-    public class InstUndefinedEventArgs : EventArgs
-    {
-        public ulong Address { get; }
-        public int   OpCode  { get; }
-
-        public InstUndefinedEventArgs(ulong address, int opCode)
-        {
-            Address = address;
-            OpCode  = opCode;
-        }
-    }
-}

ARMeilleure/State/NativeContext.cs

@@ -34,6 +34,12 @@ namespace ARMeilleure.State
             GetStorage().ExclusiveAddress = ulong.MaxValue;
         }
 
+        public ulong GetPc()
+        {
+            // TODO: More precise tracking of PC value.
+            return GetStorage().DispatchAddress;
+        }
+
         public unsafe ulong GetX(int index)
         {
             if ((uint)index >= RegisterConsts.IntRegsCount)
@@ -95,6 +101,25 @@ namespace ARMeilleure.State
             GetStorage().Flags[(int)flag] = value ? 1u : 0u;
         }
 
+        public unsafe uint GetPstate()
+        {
+            uint value = 0;
+            for (int flag = 0; flag < RegisterConsts.FlagsCount; flag++)
+            {
+                value |= GetStorage().Flags[flag] != 0 ? 1u << flag : 0u;
+            }
+            return value;
+        }
+
+        public unsafe void SetPstate(uint value)
+        {
+            for (int flag = 0; flag < RegisterConsts.FlagsCount; flag++)
+            {
+                uint bit = 1u << flag;
+                GetStorage().Flags[flag] = (value & bit) == bit ? 1u : 0u;
+            }
+        }
+
         public unsafe bool GetFPStateFlag(FPState flag)
         {
             if ((uint)flag >= RegisterConsts.FpFlagsCount)

ARMeilleure/Translation/ArmEmitterContext.cs

@@ -54,6 +54,11 @@ namespace ARMeilleure.Translation
         public bool HighCq { get; }
         public Aarch32Mode Mode { get; }
 
+        private int _ifThenBlockStateIndex = 0;
+        private Condition[] _ifThenBlockState = { };
+        public bool IsInIfThenBlock => _ifThenBlockStateIndex < _ifThenBlockState.Length;
+        public Condition CurrentIfThenBlockCond => _ifThenBlockState[_ifThenBlockStateIndex];
+
         public ArmEmitterContext(
             IMemoryManager memory,
             EntryTable<uint> countTable,
@@ -196,5 +201,19 @@ namespace ARMeilleure.Translation
 
             return default;
         }
+
+        public void SetIfThenBlockState(Condition[] state)
+        {
+            _ifThenBlockState = state;
+            _ifThenBlockStateIndex = 0;
+        }
+
+        public void AdvanceIfThenBlockState()
+        {
+            if (IsInIfThenBlock)
+            {
+                _ifThenBlockStateIndex++;
+            }
+        }
     }
 }

ARMeilleure/Translation/Delegates.cs

@@ -114,7 +114,8 @@ namespace ARMeilleure.Translation
             SetDelegateInfo(typeof(NativeInterface).GetMethod(nameof(NativeInterface.GetFpscr))); // A32 only.
             SetDelegateInfo(typeof(NativeInterface).GetMethod(nameof(NativeInterface.GetFpsr)));
             SetDelegateInfo(typeof(NativeInterface).GetMethod(nameof(NativeInterface.GetFunctionAddress)));
-            SetDelegateInfo(typeof(NativeInterface).GetMethod(nameof(NativeInterface.GetTpidr)));
+            SetDelegateInfo(typeof(NativeInterface).GetMethod(nameof(NativeInterface.InvalidateCacheLine)));
+            SetDelegateInfo(typeof(NativeInterface).GetMethod(nameof(NativeInterface.GetTpidrroEl0)));
             SetDelegateInfo(typeof(NativeInterface).GetMethod(nameof(NativeInterface.GetTpidr32))); // A32 only.
             SetDelegateInfo(typeof(NativeInterface).GetMethod(nameof(NativeInterface.GetTpidrEl0)));
             SetDelegateInfo(typeof(NativeInterface).GetMethod(nameof(NativeInterface.GetTpidrEl032))); // A32 only.
@@ -205,6 +206,7 @@ namespace ARMeilleure.Translation
             SetDelegateInfo(typeof(SoftFallback).GetMethod(nameof(SoftFallback.UnsignedSrcUnsignedDstSatQ)));
 
             SetDelegateInfo(typeof(SoftFloat16_32).GetMethod(nameof(SoftFloat16_32.FPConvert)));
+            SetDelegateInfo(typeof(SoftFloat16_64).GetMethod(nameof(SoftFloat16_64.FPConvert)));
 
             SetDelegateInfo(typeof(SoftFloat32).GetMethod(nameof(SoftFloat32.FPAdd)));
             SetDelegateInfo(typeof(SoftFloat32).GetMethod(nameof(SoftFloat32.FPAddFpscr))); // A32 only.
@@ -293,6 +295,8 @@ namespace ARMeilleure.Translation
             SetDelegateInfo(typeof(SoftFloat64).GetMethod(nameof(SoftFloat64.FPRSqrtStepFused)));
             SetDelegateInfo(typeof(SoftFloat64).GetMethod(nameof(SoftFloat64.FPSqrt)));
             SetDelegateInfo(typeof(SoftFloat64).GetMethod(nameof(SoftFloat64.FPSub)));
+
+            SetDelegateInfo(typeof(SoftFloat64_16).GetMethod(nameof(SoftFloat64_16.FPConvert)));
         }
     }
 }

ARMeilleure/Translation/IntervalTree.cs

@@ -0,0 +1,756 @@
+using System;
+using System.Collections.Generic;
+
+namespace ARMeilleure.Translation
+{
+    /// <summary>
+    /// An Augmented Interval Tree based off of the "TreeDictionary"'s Red-Black Tree. Allows fast overlap checking of ranges.
+    /// </summary>
+    /// <typeparam name="K">Key</typeparam>
+    /// <typeparam name="V">Value</typeparam>
+    class IntervalTree<K, V> where K : IComparable<K>
+    {
+        private const int ArrayGrowthSize = 32;
+
+        private const bool Black = true;
+        private const bool Red = false;
+        private IntervalTreeNode<K, V> _root = null;
+        private int _count = 0;
+
+        public int Count => _count;
+
+        public IntervalTree() { }
+
+        #region Public Methods
+
+        /// <summary>
+        /// Gets the values of the interval whose key is <paramref name="key"/>.
+        /// </summary>
+        /// <param name="key">Key of the node value to get</param>
+        /// <param name="value">Value with the given <paramref name="key"/></param>
+        /// <returns>True if the key is on the dictionary, false otherwise</returns>
+        public bool TryGet(K key, out V value)
+        {
+            IntervalTreeNode<K, V> node = GetNode(key);
+
+            if (node == null)
+            {
+                value = default;
+                return false;
+            }
+
+            value = node.Value;
+            return true;
+        }
+
+        /// <summary>
+        /// Returns the start addresses of the intervals whose start and end keys overlap the given range.
+        /// </summary>
+        /// <param name="start">Start of the range</param>
+        /// <param name="end">End of the range</param>
+        /// <param name="overlaps">Overlaps array to place results in</param>
+        /// <param name="overlapCount">Index to start writing results into the array. Defaults to 0</param>
+        /// <returns>Number of intervals found</returns>
+        public int Get(K start, K end, ref K[] overlaps, int overlapCount = 0)
+        {
+            GetKeys(_root, start, end, ref overlaps, ref overlapCount);
+
+            return overlapCount;
+        }
+
+        /// <summary>
+        /// Adds a new interval into the tree whose start is <paramref name="start"/>, end is <paramref name="end"/> and value is <paramref name="value"/>.
+        /// </summary>
+        /// <param name="start">Start of the range to add</param>
+        /// <param name="end">End of the range to insert</param>
+        /// <param name="value">Value to add</param>
+        /// <param name="updateFactoryCallback">Optional factory used to create a new value if <paramref name="start"/> is already on the tree</param>
+        /// <exception cref="ArgumentNullException"><paramref name="value"/> is null</exception>
+        /// <returns>True if the value was added, false if the start key was already in the dictionary</returns>
+        public bool AddOrUpdate(K start, K end, V value, Func<K, V, V> updateFactoryCallback)
+        {
+            if (value == null)
+            {
+                throw new ArgumentNullException(nameof(value));
+            }
+
+            return BSTInsert(start, end, value, updateFactoryCallback, out IntervalTreeNode<K, V> node);
+        }
+
+        /// <summary>
+        /// Gets an existing or adds a new interval into the tree whose start is <paramref name="start"/>, end is <paramref name="end"/> and value is <paramref name="value"/>.
+        /// </summary>
+        /// <param name="start">Start of the range to add</param>
+        /// <param name="end">End of the range to insert</param>
+        /// <param name="value">Value to add</param>
+        /// <exception cref="ArgumentNullException"><paramref name="value"/> is null</exception>
+        /// <returns><paramref name="value"/> if <paramref name="start"/> is not yet on the tree, or the existing value otherwise</returns>
+        public V GetOrAdd(K start, K end, V value)
+        {
+            if (value == null)
+            {
+                throw new ArgumentNullException(nameof(value));
+            }
+
+            BSTInsert(start, end, value, null, out IntervalTreeNode<K, V> node);
+            return node.Value;
+        }
+
+        /// <summary>
+        /// Removes a value from the tree, searching for it with <paramref name="key"/>.
+        /// </summary>
+        /// <param name="key">Key of the node to remove</param>
+        /// <returns>Number of deleted values</returns>
+        public int Remove(K key)
+        {
+            int removed = Delete(key);
+
+            _count -= removed;
+
+            return removed;
+        }
+
+        /// <summary>
+        /// Adds all the nodes in the dictionary into <paramref name="list"/>.
+        /// </summary>
+        /// <returns>A list of all values sorted by Key Order</returns>
+        public List<V> AsList()
+        {
+            List<V> list = new List<V>();
+
+            AddToList(_root, list);
+
+            return list;
+        }
+
+        #endregion
+
+        #region Private Methods (BST)
+
+        /// <summary>
+        /// Adds all values that are children of or contained within <paramref name="node"/> into <paramref name="list"/>, in Key Order.
+        /// </summary>
+        /// <param name="node">The node to search for values within</param>
+        /// <param name="list">The list to add values to</param>
+        private void AddToList(IntervalTreeNode<K, V> node, List<V> list)
+        {
+            if (node == null)
+            {
+                return;
+            }
+
+            AddToList(node.Left, list);
+
+            list.Add(node.Value);
+
+            AddToList(node.Right, list);
+        }
+
+        /// <summary>
+        /// Retrieve the node reference whose key is <paramref name="key"/>, or null if no such node exists.
+        /// </summary>
+        /// <param name="key">Key of the node to get</param>
+        /// <exception cref="ArgumentNullException"><paramref name="key"/> is null</exception>
+        /// <returns>Node reference in the tree</returns>
+        private IntervalTreeNode<K, V> GetNode(K key)
+        {
+            if (key == null)
+            {
+                throw new ArgumentNullException(nameof(key));
+            }
+
+            IntervalTreeNode<K, V> node = _root;
+            while (node != null)
+            {
+                int cmp = key.CompareTo(node.Start);
+                if (cmp < 0)
+                {
+                    node = node.Left;
+                }
+                else if (cmp > 0)
+                {
+                    node = node.Right;
+                }
+                else
+                {
+                    return node;
+                }
+            }
+            return null;
+        }
+
+        /// <summary>
+        /// Retrieve all keys that overlap the given start and end keys.
+        /// </summary>
+        /// <param name="start">Start of the range</param>
+        /// <param name="end">End of the range</param>
+        /// <param name="overlaps">Overlaps array to place results in</param>
+        /// <param name="overlapCount">Overlaps count to update</param>
+        private void GetKeys(IntervalTreeNode<K, V> node, K start, K end, ref K[] overlaps, ref int overlapCount)
+        {
+            if (node == null || start.CompareTo(node.Max) >= 0)
+            {
+                return;
+            }
+
+            GetKeys(node.Left, start, end, ref overlaps, ref overlapCount);
+
+            bool endsOnRight = end.CompareTo(node.Start) > 0;
+            if (endsOnRight)
+            {
+                if (start.CompareTo(node.End) < 0)
+                {
+                    if (overlaps.Length >= overlapCount)
+                    {
+                        Array.Resize(ref overlaps, overlapCount + ArrayGrowthSize);
+                    }
+
+                    overlaps[overlapCount++] = node.Start;
+                }
+
+                GetKeys(node.Right, start, end, ref overlaps, ref overlapCount);
+            }
+        }
+
+        /// <summary>
+        /// Propagate an increase in max value starting at the given node, heading up the tree.
+        /// This should only be called if the max increases - not for rebalancing or removals.
+        /// </summary>
+        /// <param name="node">The node to start propagating from</param>
+        private void PropagateIncrease(IntervalTreeNode<K, V> node)
+        {
+            K max = node.Max;
+            IntervalTreeNode<K, V> ptr = node;
+
+            while ((ptr = ptr.Parent) != null)
+            {
+                if (max.CompareTo(ptr.Max) > 0)
+                {
+                    ptr.Max = max;
+                }
+                else
+                {
+                    break;
+                }
+            }
+        }
+
+        /// <summary>
+        /// Propagate recalculating max value starting at the given node, heading up the tree.
+        /// This fully recalculates the max value from all children when there is potential for it to decrease.
+        /// </summary>
+        /// <param name="node">The node to start propagating from</param>
+        private void PropagateFull(IntervalTreeNode<K, V> node)
+        {
+            IntervalTreeNode<K, V> ptr = node;
+
+            do
+            {
+                K max = ptr.End;
+
+                if (ptr.Left != null && ptr.Left.Max.CompareTo(max) > 0)
+                {
+                    max = ptr.Left.Max;
+                }
+
+                if (ptr.Right != null && ptr.Right.Max.CompareTo(max) > 0)
+                {
+                    max = ptr.Right.Max;
+                }
+
+                ptr.Max = max;
+            } while ((ptr = ptr.Parent) != null);
+        }
+
+        /// <summary>
+        /// Insertion Mechanism for the interval tree. Similar to a BST insert, with the start of the range as the key.
+        /// Iterates the tree starting from the root and inserts a new node where all children in the left subtree are less than <paramref name="start"/>, and all children in the right subtree are greater than <paramref name="start"/>.
+        /// Each node can contain multiple values, and has an end address which is the maximum of all those values.
+        /// Post insertion, the "max" value of the node and all parents are updated.
+        /// </summary>
+        /// <param name="start">Start of the range to insert</param>
+        /// <param name="end">End of the range to insert</param>
+        /// <param name="value">Value to insert</param>
+        /// <param name="updateFactoryCallback">Optional factory used to create a new value if <paramref name="start"/> is already on the tree</param>
+        /// <param name="outNode">Node that was inserted or modified</param>
+        /// <returns>True if <paramref name="start"/> was not yet on the tree, false otherwise</returns>
+        private bool BSTInsert(K start, K end, V value, Func<K, V, V> updateFactoryCallback, out IntervalTreeNode<K, V> outNode)
+        {
+            IntervalTreeNode<K, V> parent = null;
+            IntervalTreeNode<K, V> node = _root;
+
+            while (node != null)
+            {
+                parent = node;
+                int cmp = start.CompareTo(node.Start);
+                if (cmp < 0)
+                {
+                    node = node.Left;
+                }
+                else if (cmp > 0)
+                {
+                    node = node.Right;
+                }
+                else
+                {
+                    outNode = node;
+
+                    if (updateFactoryCallback != null)
+                    {
+                        // Replace
+                        node.Value = updateFactoryCallback(start, node.Value);
+
+                        int endCmp = end.CompareTo(node.End);
+
+                        if (endCmp > 0)
+                        {
+                            node.End = end;
+                            if (end.CompareTo(node.Max) > 0)
+                            {
+                                node.Max = end;
+                                PropagateIncrease(node);
+                                RestoreBalanceAfterInsertion(node);
+                            }
+                        }
+                        else if (endCmp < 0)
+                        {
+                            node.End = end;
+                            PropagateFull(node);
+                        }
+                    }
+
+                    return false;
+                }
+            }
+            IntervalTreeNode<K, V> newNode = new IntervalTreeNode<K, V>(start, end, value, parent);
+            if (newNode.Parent == null)
+            {
+                _root = newNode;
+            }
+            else if (start.CompareTo(parent.Start) < 0)
+            {
+                parent.Left = newNode;
+            }
+            else
+            {
+                parent.Right = newNode;
+            }
+
+            PropagateIncrease(newNode);
+            _count++;
+            RestoreBalanceAfterInsertion(newNode);
+            outNode = newNode;
+            return true;
+        }
+
+        /// <summary>
+        /// Removes the value from the dictionary after searching for it with <paramref name="key">.
+        /// </summary>
+        /// <param name="key">Key to search for</param>
+        /// <returns>Number of deleted values</returns>
+        private int Delete(K key)
+        {
+            IntervalTreeNode<K, V> nodeToDelete = GetNode(key);
+
+            if (nodeToDelete == null)
+            {
+                return 0;
+            }
+
+            IntervalTreeNode<K, V> replacementNode;
+
+            if (LeftOf(nodeToDelete) == null || RightOf(nodeToDelete) == null)
+            {
+                replacementNode = nodeToDelete;
+            }
+            else
+            {
+                replacementNode = PredecessorOf(nodeToDelete);
+            }
+
+            IntervalTreeNode<K, V> tmp = LeftOf(replacementNode) ?? RightOf(replacementNode);
+
+            if (tmp != null)
+            {
+                tmp.Parent = ParentOf(replacementNode);
+            }
+
+            if (ParentOf(replacementNode) == null)
+            {
+                _root = tmp;
+            }
+            else if (replacementNode == LeftOf(ParentOf(replacementNode)))
+            {
+                ParentOf(replacementNode).Left = tmp;
+            }
+            else
+            {
+                ParentOf(replacementNode).Right = tmp;
+            }
+
+            if (replacementNode != nodeToDelete)
+            {
+                nodeToDelete.Start = replacementNode.Start;
+                nodeToDelete.Value = replacementNode.Value;
+                nodeToDelete.End = replacementNode.End;
+                nodeToDelete.Max = replacementNode.Max;
+            }
+
+            PropagateFull(replacementNode);
+
+            if (tmp != null && ColorOf(replacementNode) == Black)
+            {
+                RestoreBalanceAfterRemoval(tmp);
+            }
+
+            return 1;
+        }
+
+        /// <summary>
+        /// Returns the node with the largest key where <paramref name="node"/> is considered the root node.
+        /// </summary>
+        /// <param name="node">Root Node</param>
+        /// <returns>Node with the maximum key in the tree of <paramref name="node"/></returns>
+        private static IntervalTreeNode<K, V> Maximum(IntervalTreeNode<K, V> node)
+        {
+            IntervalTreeNode<K, V> tmp = node;
+            while (tmp.Right != null)
+            {
+                tmp = tmp.Right;
+            }
+
+            return tmp;
+        }
+
+        /// <summary>
+        /// Finds the node whose key is immediately less than <paramref name="node"/>.
+        /// </summary>
+        /// <param name="node">Node to find the predecessor of</param>
+        /// <returns>Predecessor of <paramref name="node"/></returns>
+        private static IntervalTreeNode<K, V> PredecessorOf(IntervalTreeNode<K, V> node)
+        {
+            if (node.Left != null)
+            {
+                return Maximum(node.Left);
+            }
+            IntervalTreeNode<K, V> parent = node.Parent;
+            while (parent != null && node == parent.Left)
+            {
+                node = parent;
+                parent = parent.Parent;
+            }
+            return parent;
+        }
+
+        #endregion
+
+        #region Private Methods (RBL)
+
+        private void RestoreBalanceAfterRemoval(IntervalTreeNode<K, V> balanceNode)
+        {
+            IntervalTreeNode<K, V> ptr = balanceNode;
+
+            while (ptr != _root && ColorOf(ptr) == Black)
+            {
+                if (ptr == LeftOf(ParentOf(ptr)))
+                {
+                    IntervalTreeNode<K, V> sibling = RightOf(ParentOf(ptr));
+
+                    if (ColorOf(sibling) == Red)
+                    {
+                        SetColor(sibling, Black);
+                        SetColor(ParentOf(ptr), Red);
+                        RotateLeft(ParentOf(ptr));
+                        sibling = RightOf(ParentOf(ptr));
+                    }
+                    if (ColorOf(LeftOf(sibling)) == Black && ColorOf(RightOf(sibling)) == Black)
+                    {
+                        SetColor(sibling, Red);
+                        ptr = ParentOf(ptr);
+                    }
+                    else
+                    {
+                        if (ColorOf(RightOf(sibling)) == Black)
+                        {
+                            SetColor(LeftOf(sibling), Black);
+                            SetColor(sibling, Red);
+                            RotateRight(sibling);
+                            sibling = RightOf(ParentOf(ptr));
+                        }
+                        SetColor(sibling, ColorOf(ParentOf(ptr)));
+                        SetColor(ParentOf(ptr), Black);
+                        SetColor(RightOf(sibling), Black);
+                        RotateLeft(ParentOf(ptr));
+                        ptr = _root;
+                    }
+                }
+                else
+                {
+                    IntervalTreeNode<K, V> sibling = LeftOf(ParentOf(ptr));
+
+                    if (ColorOf(sibling) == Red)
+                    {
+                        SetColor(sibling, Black);
+                        SetColor(ParentOf(ptr), Red);
+                        RotateRight(ParentOf(ptr));
+                        sibling = LeftOf(ParentOf(ptr));
+                    }
+                    if (ColorOf(RightOf(sibling)) == Black && ColorOf(LeftOf(sibling)) == Black)
+                    {
+                        SetColor(sibling, Red);
+                        ptr = ParentOf(ptr);
+                    }
+                    else
+                    {
+                        if (ColorOf(LeftOf(sibling)) == Black)
+                        {
+                            SetColor(RightOf(sibling), Black);
+                            SetColor(sibling, Red);
+                            RotateLeft(sibling);
+                            sibling = LeftOf(ParentOf(ptr));
+                        }
+                        SetColor(sibling, ColorOf(ParentOf(ptr)));
+                        SetColor(ParentOf(ptr), Black);
+                        SetColor(LeftOf(sibling), Black);
+                        RotateRight(ParentOf(ptr));
+                        ptr = _root;
+                    }
+                }
+            }
+            SetColor(ptr, Black);
+        }
+
+        private void RestoreBalanceAfterInsertion(IntervalTreeNode<K, V> balanceNode)
+        {
+            SetColor(balanceNode, Red);
+            while (balanceNode != null && balanceNode != _root && ColorOf(ParentOf(balanceNode)) == Red)
+            {
+                if (ParentOf(balanceNode) == LeftOf(ParentOf(ParentOf(balanceNode))))
+                {
+                    IntervalTreeNode<K, V> sibling = RightOf(ParentOf(ParentOf(balanceNode)));
+
+                    if (ColorOf(sibling) == Red)
+                    {
+                        SetColor(ParentOf(balanceNode), Black);
+                        SetColor(sibling, Black);
+                        SetColor(ParentOf(ParentOf(balanceNode)), Red);
+                        balanceNode = ParentOf(ParentOf(balanceNode));
+                    }
+                    else
+                    {
+                        if (balanceNode == RightOf(ParentOf(balanceNode)))
+                        {
+                            balanceNode = ParentOf(balanceNode);
+                            RotateLeft(balanceNode);
+                        }
+                        SetColor(ParentOf(balanceNode), Black);
+                        SetColor(ParentOf(ParentOf(balanceNode)), Red);
+                        RotateRight(ParentOf(ParentOf(balanceNode)));
+                    }
+                }
+                else
+                {
+                    IntervalTreeNode<K, V> sibling = LeftOf(ParentOf(ParentOf(balanceNode)));
+
+                    if (ColorOf(sibling) == Red)
+                    {
+                        SetColor(ParentOf(balanceNode), Black);
+                        SetColor(sibling, Black);
+                        SetColor(ParentOf(ParentOf(balanceNode)), Red);
+                        balanceNode = ParentOf(ParentOf(balanceNode));
+                    }
+                    else
+                    {
+                        if (balanceNode == LeftOf(ParentOf(balanceNode)))
+                        {
+                            balanceNode = ParentOf(balanceNode);
+                            RotateRight(balanceNode);
+                        }
+                        SetColor(ParentOf(balanceNode), Black);
+                        SetColor(ParentOf(ParentOf(balanceNode)), Red);
+                        RotateLeft(ParentOf(ParentOf(balanceNode)));
+                    }
+                }
+            }
+            SetColor(_root, Black);
+        }
+
+        private void RotateLeft(IntervalTreeNode<K, V> node)
+        {
+            if (node != null)
+            {
+                IntervalTreeNode<K, V> right = RightOf(node);
+                node.Right = LeftOf(right);
+                if (node.Right != null)
+                {
+                    node.Right.Parent = node;
+                }
+                IntervalTreeNode<K, V> nodeParent = ParentOf(node);
+                right.Parent = nodeParent;
+                if (nodeParent == null)
+                {
+                    _root = right;
+                }
+                else if (node == LeftOf(nodeParent))
+                {
+                    nodeParent.Left = right;
+                }
+                else
+                {
+                    nodeParent.Right = right;
+                }
+                right.Left = node;
+                node.Parent = right;
+
+                PropagateFull(node);
+            }
+        }
+
+        private void RotateRight(IntervalTreeNode<K, V> node)
+        {
+            if (node != null)
+            {
+                IntervalTreeNode<K, V> left = LeftOf(node);
+                node.Left = RightOf(left);
+                if (node.Left != null)
+                {
+                    node.Left.Parent = node;
+                }
+                IntervalTreeNode<K, V> nodeParent = ParentOf(node);
+                left.Parent = nodeParent;
+                if (nodeParent == null)
+                {
+                    _root = left;
+                }
+                else if (node == RightOf(nodeParent))
+                {
+                    nodeParent.Right = left;
+                }
+                else
+                {
+                    nodeParent.Left = left;
+                }
+                left.Right = node;
+                node.Parent = left;
+
+                PropagateFull(node);
+            }
+        }
+
+        #endregion
+
+        #region Safety-Methods
+
+        // These methods save memory by allowing us to forego sentinel nil nodes, as well as serve as protection against NullReferenceExceptions.
+
+        /// <summary>
+        /// Returns the color of <paramref name="node"/>, or Black if it is null.
+        /// </summary>
+        /// <param name="node">Node</param>
+        /// <returns>The boolean color of <paramref name="node"/>, or black if null</returns>
+        private static bool ColorOf(IntervalTreeNode<K, V> node)
+        {
+            return node == null || node.Color;
+        }
+
+        /// <summary>
+        /// Sets the color of <paramref name="node"/> node to <paramref name="color"/>.
+        /// <br></br>
+        /// This method does nothing if <paramref name="node"/> is null.
+        /// </summary>
+        /// <param name="node">Node to set the color of</param>
+        /// <param name="color">Color (Boolean)</param>
+        private static void SetColor(IntervalTreeNode<K, V> node, bool color)
+        {
+            if (node != null)
+            {
+                node.Color = color;
+            }
+        }
+
+        /// <summary>
+        /// This method returns the left node of <paramref name="node"/>, or null if <paramref name="node"/> is null.
+        /// </summary>
+        /// <param name="node">Node to retrieve the left child from</param>
+        /// <returns>Left child of <paramref name="node"/></returns>
+        private static IntervalTreeNode<K, V> LeftOf(IntervalTreeNode<K, V> node)
+        {
+            return node?.Left;
+        }
+
+        /// <summary>
+        /// This method returns the right node of <paramref name="node"/>, or null if <paramref name="node"/> is null.
+        /// </summary>
+        /// <param name="node">Node to retrieve the right child from</param>
+        /// <returns>Right child of <paramref name="node"/></returns>
+        private static IntervalTreeNode<K, V> RightOf(IntervalTreeNode<K, V> node)
+        {
+            return node?.Right;
+        }
+
+        /// <summary>
+        /// Returns the parent node of <paramref name="node"/>, or null if <paramref name="node"/> is null.
+        /// </summary>
+        /// <param name="node">Node to retrieve the parent from</param>
+        /// <returns>Parent of <paramref name="node"/></returns>
+        private static IntervalTreeNode<K, V> ParentOf(IntervalTreeNode<K, V> node)
+        {
+            return node?.Parent;
+        }
+
+        #endregion
+
+        public bool ContainsKey(K key)
+        {
+            return GetNode(key) != null;
+        }
+
+        public void Clear()
+        {
+            _root = null;
+            _count = 0;
+        }
+    }
+
+    /// <summary>
+    /// Represents a node in the IntervalTree which contains start and end keys of type K, and a value of generic type V.
+    /// </summary>
+    /// <typeparam name="K">Key type of the node</typeparam>
+    /// <typeparam name="V">Value type of the node</typeparam>
+    class IntervalTreeNode<K, V>
+    {
+        public bool Color = true;
+        public IntervalTreeNode<K, V> Left = null;
+        public IntervalTreeNode<K, V> Right = null;
+        public IntervalTreeNode<K, V> Parent = null;
+
+        /// <summary>
+        /// The start of the range.
+        /// </summary>
+        public K Start;
+
+        /// <summary>
+        /// The end of the range.
+        /// </summary>
+        public K End;
+
+        /// <summary>
+        /// The maximum end value of this node and all its children.
+        /// </summary>
+        public K Max;
+
+        /// <summary>
+        /// Value stored on this node.
+        /// </summary>
+        public V Value;
+
+        public IntervalTreeNode(K start, K end, V value, IntervalTreeNode<K, V> parent)
+        {
+            Start = start;
+            End = end;
+            Max = end;
+            Value = value;
+            Parent = parent;
+        }
+    }
+}

ARMeilleure/Translation/PTC/Ptc.cs

@@ -27,7 +27,7 @@ namespace ARMeilleure.Translation.PTC
         private const string OuterHeaderMagicString = "PTCohd\0\0";
         private const string InnerHeaderMagicString = "PTCihd\0\0";
 
-        private const uint InternalVersion = 3061; //! To be incremented manually for each change to the ARMeilleure project.
+        private const uint InternalVersion = 3439; //! To be incremented manually for each change to the ARMeilleure project.
 
         private const string ActualDir = "0";
         private const string BackupDir = "1";
@@ -585,7 +585,7 @@ namespace ARMeilleure.Translation.PTC
 
                     translator.RegisterFunction(infoEntry.Address, func);
 
-                    bool isAddressUnique = translator.Functions.TryAdd(infoEntry.Address, func);
+                    bool isAddressUnique = translator.Functions.TryAdd(infoEntry.Address, infoEntry.GuestSize, func);
 
                     Debug.Assert(isAddressUnique, $"The address 0x{infoEntry.Address:X16} is not unique.");
                 }
@@ -815,7 +815,7 @@ namespace ARMeilleure.Translation.PTC
 
                     TranslatedFunction func = translator.Translate(address, item.funcProfile.Mode, item.funcProfile.HighCq);
 
-                    bool isAddressUnique = translator.Functions.TryAdd(address, func);
+                    bool isAddressUnique = translator.Functions.TryAdd(address, func.GuestSize, func);
 
                     Debug.Assert(isAddressUnique, $"The address 0x{address:X16} is not unique.");
 

ARMeilleure/Translation/PTC/PtcProfiler.cs

@@ -96,7 +96,7 @@ namespace ARMeilleure.Translation.PTC
             return address >= StaticCodeStart && address < StaticCodeStart + StaticCodeSize;
         }
 
-        internal static ConcurrentQueue<(ulong address, FuncProfile funcProfile)> GetProfiledFuncsToTranslate(ConcurrentDictionary<ulong, TranslatedFunction> funcs)
+        internal static ConcurrentQueue<(ulong address, FuncProfile funcProfile)> GetProfiledFuncsToTranslate(TranslatorCache<TranslatedFunction> funcs)
         {
             var profiledFuncsToTranslate = new ConcurrentQueue<(ulong address, FuncProfile funcProfile)>();
 

ARMeilleure/Translation/SsaConstruction.cs

@@ -113,7 +113,7 @@ namespace ARMeilleure.Translation
                     }
                 }
 
-                Array.Clear(localDefs, 0, localDefs.Length);
+                Array.Clear(localDefs);
             }
 
             // Second pass, rename variables with definitions on different blocks.

ARMeilleure/Translation/Translator.cs

@@ -49,7 +49,7 @@ namespace ARMeilleure.Translation
         private readonly AutoResetEvent _backgroundTranslatorEvent;
         private readonly ReaderWriterLock _backgroundTranslatorLock;
 
-        internal ConcurrentDictionary<ulong, TranslatedFunction> Functions { get; }
+        internal TranslatorCache<TranslatedFunction> Functions { get; }
         internal AddressTable<ulong> FunctionTable { get; }
         internal EntryTable<uint> CountTable { get; }
         internal TranslatorStubs Stubs { get; }
@@ -75,7 +75,7 @@ namespace ARMeilleure.Translation
             JitCache.Initialize(allocator);
 
             CountTable = new EntryTable<uint>();
-            Functions = new ConcurrentDictionary<ulong, TranslatedFunction>();
+            Functions = new TranslatorCache<TranslatedFunction>();
             FunctionTable = new AddressTable<ulong>(for64Bits ? Levels64Bit : Levels32Bit);
             Stubs = new TranslatorStubs(this);
 
@@ -98,7 +98,7 @@ namespace ARMeilleure.Translation
                 {
                     TranslatedFunction func = Translate(request.Address, request.Mode, highCq: true);
 
-                    Functions.AddOrUpdate(request.Address, func, (key, oldFunc) =>
+                    Functions.AddOrUpdate(request.Address, func.GuestSize, func, (key, oldFunc) =>
                     {
                         EnqueueForDeletion(key, oldFunc);
                         return func;
@@ -196,7 +196,7 @@ namespace ARMeilleure.Translation
             }
         }
 
-        public ulong ExecuteSingle(State.ExecutionContext context, ulong address)
+        private ulong ExecuteSingle(State.ExecutionContext context, ulong address)
         {
             TranslatedFunction func = GetOrTranslate(address, context.ExecutionMode);
 
@@ -209,13 +209,24 @@ namespace ARMeilleure.Translation
             return nextAddr;
         }
 
+        public ulong Step(State.ExecutionContext context, ulong address)
+        {
+            TranslatedFunction func = Translate(address, context.ExecutionMode, highCq: false, singleStep: true);
+
+            address = func.Execute(context);
+
+            EnqueueForDeletion(address, func);
+
+            return address;
+        }
+
         internal TranslatedFunction GetOrTranslate(ulong address, ExecutionMode mode)
         {
             if (!Functions.TryGetValue(address, out TranslatedFunction func))
             {
                 func = Translate(address, mode, highCq: false);
 
-                TranslatedFunction oldFunc = Functions.GetOrAdd(address, func);
+                TranslatedFunction oldFunc = Functions.GetOrAdd(address, func.GuestSize, func);
 
                 if (oldFunc != func)
                 {
@@ -242,7 +253,7 @@ namespace ARMeilleure.Translation
             }
         }
 
-        internal TranslatedFunction Translate(ulong address, ExecutionMode mode, bool highCq)
+        internal TranslatedFunction Translate(ulong address, ExecutionMode mode, bool highCq, bool singleStep = false)
         {
             var context = new ArmEmitterContext(
                 Memory,
@@ -255,7 +266,7 @@ namespace ARMeilleure.Translation
 
             Logger.StartPass(PassName.Decoding);
 
-            Block[] blocks = Decoder.Decode(Memory, address, mode, highCq, singleBlock: false);
+            Block[] blocks = Decoder.Decode(Memory, address, mode, highCq, singleStep ? DecoderMode.SingleInstruction : DecoderMode.MultipleBlocks);
 
             Logger.EndPass(PassName.Decoding);
 
@@ -285,14 +296,14 @@ namespace ARMeilleure.Translation
 
             var options = highCq ? CompilerOptions.HighCq : CompilerOptions.None;
 
-            if (context.HasPtc)
+            if (context.HasPtc && !singleStep)
             {
                 options |= CompilerOptions.Relocatable;
             }
 
             CompiledFunction compiledFunc = Compiler.Compile(cfg, argTypes, retType, options);
 
-            if (context.HasPtc)
+            if (context.HasPtc && !singleStep)
             {
                 Hash128 hash = Ptc.ComputeHash(Memory, address, funcSize);
 
@@ -380,6 +391,13 @@ namespace ARMeilleure.Translation
 
                         Operand lblPredicateSkip = default;
 
+                        if (context.IsInIfThenBlock && context.CurrentIfThenBlockCond != Condition.Al)
+                        {
+                            lblPredicateSkip = Label();
+
+                            InstEmitFlowHelper.EmitCondBranch(context, lblPredicateSkip, context.CurrentIfThenBlockCond.Invert());
+                        }
+
                         if (opCode is OpCode32 op && op.Cond < Condition.Al)
                         {
                             lblPredicateSkip = Label();
@@ -400,6 +418,11 @@ namespace ARMeilleure.Translation
                         {
                             context.MarkLabel(lblPredicateSkip);
                         }
+
+                        if (context.IsInIfThenBlock && opCode.Instruction.Name != InstName.It)
+                        {
+                            context.AdvanceIfThenBlockState();
+                        }
                     }
                 }
             }
@@ -459,7 +482,24 @@ namespace ARMeilleure.Translation
             // If rejit is running, stop it as it may be trying to rejit a function on the invalidated region.
             ClearRejitQueue(allowRequeue: true);
 
-            // TODO: Completely remove functions overlapping the specified range from the cache.
+            ulong[] overlapAddresses = Array.Empty<ulong>();
+
+            int overlapsCount = Functions.GetOverlaps(address, size, ref overlapAddresses);
+
+            for (int index = 0; index < overlapsCount; index++)
+            {
+                ulong overlapAddress = overlapAddresses[index];
+
+                if (Functions.TryGetValue(overlapAddress, out TranslatedFunction overlap))
+                {
+                    Functions.Remove(overlapAddress);
+                    Volatile.Write(ref FunctionTable.GetValue(overlapAddress), FunctionTable.Fill);
+                    EnqueueForDeletion(overlapAddress, overlap);
+                }
+            }
+
+            // TODO: Remove overlapping functions from the JitCache aswell.
+            // This should be done safely, with a mechanism to ensure the function is not being executed.
         }
 
         internal void EnqueueForRejit(ulong guestAddress, ExecutionMode mode)
@@ -481,7 +521,9 @@ namespace ARMeilleure.Translation
             // Ensure no attempt will be made to compile new functions due to rejit.
             ClearRejitQueue(allowRequeue: false);
 
-            foreach (var func in Functions.Values)
+            List<TranslatedFunction> functions = Functions.AsList();
+
+            foreach (var func in functions)
             {
                 JitCache.Unmap(func.FuncPtr);
 

ARMeilleure/Translation/TranslatorCache.cs

@@ -0,0 +1,95 @@
+using System;
+using System.Collections.Generic;
+using System.Threading;
+
+namespace ARMeilleure.Translation
+{
+    internal class TranslatorCache<T>
+    {
+        private readonly IntervalTree<ulong, T> _tree;
+        private readonly ReaderWriterLock _treeLock;
+
+        public int Count => _tree.Count;
+
+        public TranslatorCache()
+        {
+            _tree = new IntervalTree<ulong, T>();
+            _treeLock = new ReaderWriterLock();
+        }
+
+        public bool TryAdd(ulong address, ulong size, T value)
+        {
+            return AddOrUpdate(address, size, value, null);
+        }
+
+        public bool AddOrUpdate(ulong address, ulong size, T value, Func<ulong, T, T> updateFactoryCallback)
+        {
+            _treeLock.AcquireWriterLock(Timeout.Infinite);
+            bool result = _tree.AddOrUpdate(address, address + size, value, updateFactoryCallback);
+            _treeLock.ReleaseWriterLock();
+
+            return result;
+        }
+
+        public T GetOrAdd(ulong address, ulong size, T value)
+        {
+            _treeLock.AcquireWriterLock(Timeout.Infinite);
+            value = _tree.GetOrAdd(address, address + size, value);
+            _treeLock.ReleaseWriterLock();
+
+            return value;
+        }
+
+        public bool Remove(ulong address)
+        {
+            _treeLock.AcquireWriterLock(Timeout.Infinite);
+            bool removed = _tree.Remove(address) != 0;
+            _treeLock.ReleaseWriterLock();
+
+            return removed;
+        }
+
+        public void Clear()
+        {
+            _treeLock.AcquireWriterLock(Timeout.Infinite);
+            _tree.Clear();
+            _treeLock.ReleaseWriterLock();
+        }
+
+        public bool ContainsKey(ulong address)
+        {
+            _treeLock.AcquireReaderLock(Timeout.Infinite);
+            bool result = _tree.ContainsKey(address);
+            _treeLock.ReleaseReaderLock();
+
+            return result;
+        }
+
+        public bool TryGetValue(ulong address, out T value)
+        {
+            _treeLock.AcquireReaderLock(Timeout.Infinite);
+            bool result = _tree.TryGet(address, out value);
+            _treeLock.ReleaseReaderLock();
+
+            return result;
+        }
+
+        public int GetOverlaps(ulong address, ulong size, ref ulong[] overlaps)
+        {
+            _treeLock.AcquireReaderLock(Timeout.Infinite);
+            int count = _tree.Get(address, address + size, ref overlaps);
+            _treeLock.ReleaseReaderLock();
+
+            return count;
+        }
+
+        public List<T> AsList()
+        {
+            _treeLock.AcquireReaderLock(Timeout.Infinite);
+            List<T> list = _tree.AsList();
+            _treeLock.ReleaseReaderLock();
+
+            return list;
+        }
+    }
+}

README.md

@@ -129,10 +129,8 @@ All funds received through Patreon are considered a donation to support the proj
 ## License
 
 This software is licensed under the terms of the <a href="https://github.com/Ryujinx/Ryujinx/blob/master/LICENSE.txt" target="_blank">MIT license.</a></i><br />
-The Ryujinx.Audio project is licensed under the terms of the <a href="https://github.com/Ryujinx/Ryujinx/blob/master/Ryujinx.Audio/LICENSE.txt
-" target="_blank">LGPLv3 license.</a></i><br />
 This project makes use of code authored by the libvpx project, licensed under BSD and the ffmpeg project, licensed under LGPLv3.
-See [LICENSE.txt](LICENSE.txt) and [THIRDPARTY.md](Ryujinx/THIRDPARTY.md) for more details.
+See [LICENSE.txt](LICENSE.txt) and [THIRDPARTY.md](distribution/legal/THIRDPARTY.md) for more details.
 ## Credits
 
 - [LibHac](https://github.com/Thealexbarney/LibHac) is used for our file-system.

Ryujinx.Audio.Backends.OpenAL/Ryujinx.Audio.Backends.OpenAL.csproj

@@ -5,7 +5,7 @@
   </PropertyGroup>
 
   <ItemGroup>
-    <PackageReference Include="OpenTK.OpenAL" Version="4.5.0" />
+    <PackageReference Include="OpenTK.OpenAL" Version="4.7.2" />
   </ItemGroup>
 
   <ItemGroup>

Ryujinx.Audio.Backends.SoundIo/Ryujinx.Audio.Backends.SoundIo.csproj

@@ -3,7 +3,7 @@
   <PropertyGroup>
     <TargetFramework>net6.0</TargetFramework>
     <AllowUnsafeBlocks>true</AllowUnsafeBlocks>
-    <RuntimeIdentifiers>win-x64;linux-x64;osx-x64</RuntimeIdentifiers>
+    <RuntimeIdentifiers>win10-x64;linux-x64;osx-x64</RuntimeIdentifiers>
   </PropertyGroup>
 
   <ItemGroup>
@@ -15,11 +15,11 @@
       <CopyToOutputDirectory>PreserveNewest</CopyToOutputDirectory>
       <TargetPath>libsoundio.dll</TargetPath>
     </ContentWithTargetPath>
-    <ContentWithTargetPath Include="Native\libsoundio\libs\libsoundio.dylib" Condition="'$(RuntimeIdentifier)' != 'linux-x64' AND '$(RuntimeIdentifier)' != 'win-x64'">
+    <ContentWithTargetPath Include="Native\libsoundio\libs\libsoundio.dylib" Condition="'$(RuntimeIdentifier)' != 'linux-x64' AND '$(RuntimeIdentifier)' != 'win10-x64'">
       <CopyToOutputDirectory>PreserveNewest</CopyToOutputDirectory>
       <TargetPath>libsoundio.dylib</TargetPath>
     </ContentWithTargetPath>
-    <ContentWithTargetPath Include="Native\libsoundio\libs\libsoundio.so" Condition="'$(RuntimeIdentifier)' != 'win-x64' AND '$(RuntimeIdentifier)' != 'osx-x64'">
+    <ContentWithTargetPath Include="Native\libsoundio\libs\libsoundio.so" Condition="'$(RuntimeIdentifier)' != 'win10-x64' AND '$(RuntimeIdentifier)' != 'osx-x64'">
       <CopyToOutputDirectory>PreserveNewest</CopyToOutputDirectory>
       <TargetPath>libsoundio.so</TargetPath>
     </ContentWithTargetPath>

Ryujinx.Audio/AudioManager.cs

@@ -1,20 +1,3 @@
-//
-// Copyright (c) 2019-2021 Ryujinx
-//
-// This program is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// This program is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with this program.  If not, see <https://www.gnu.org/licenses/>.
-//
-
 using System;
 using System.Threading;
 

Ryujinx.Audio/Backends/Common/BackendHelper.cs

@@ -1,20 +1,3 @@
-//
-// Copyright (c) 2019-2021 Ryujinx
-//
-// This program is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// This program is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with this program.  If not, see <https://www.gnu.org/licenses/>.
-//
-
 using Ryujinx.Audio.Common;
 using System;
 

Ryujinx.Audio/Backends/Common/DynamicRingBuffer.cs

@@ -1,20 +1,3 @@
-//
-// Copyright (c) 2019-2021 Ryujinx
-//
-// This program is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// This program is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with this program.  If not, see <https://www.gnu.org/licenses/>.
-//
-
 using Ryujinx.Common;
 using System;
 

Ryujinx.Audio/Backends/Common/HardwareDeviceSessionOutputBase.cs

@@ -1,20 +1,3 @@
-//
-// Copyright (c) 2019-2021 Ryujinx
-//
-// This program is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// This program is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with this program.  If not, see <https://www.gnu.org/licenses/>.
-//
-
 using Ryujinx.Audio.Common;
 using Ryujinx.Audio.Integration;
 using Ryujinx.Memory;

Ryujinx.Audio/Backends/CompatLayer/CompatLayerHardwareDeviceDriver.cs

@@ -1,20 +1,3 @@
-//
-// Copyright (c) 2019-2021 Ryujinx
-//
-// This program is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// This program is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with this program.  If not, see <https://www.gnu.org/licenses/>.
-//
-
 using Ryujinx.Audio.Backends.Common;
 using Ryujinx.Audio.Backends.Dummy;
 using Ryujinx.Audio.Common;