ca6cf1cc90
Add Frint Instructions and Tests ( #62 )
...
* add 'ADC 32bit and Overflow' test
* Add WZR/WSP tests
* fix ADC and ADDS
* add ADCS test
* add SBCS test
* indent my code and delete comment
* '/' <- i hate you x)
* remove spacebar char
* remove false tab
* add frintx_S test
* update frintx_S test
* add ASRV test
* fix new line
* fix PR
* fix indent
* Add add_V tests
* work on Frintx_V
* Add Frintx_V Instruction
* add some instruction and test
* Syntax + indent
* Delete Console Write
* Delete Console Write 2
* CR del
* Skip NaNs tests
* Skip NaNs tests 2
* Fix errors 1
* Fix errors 2
2018-03-23 07:40:23 -03:00
4940cf0ea5
Add BFI instruction, even more audout fixes
2018-03-16 00:42:44 -03:00
88c6160c62
Add MLA (vector by element), fixes some cases of MUL (vector by element)?
2018-03-15 22:36:47 -03:00
92f47d535e
Fix crc32 instruction with size greater than a byte
2018-03-15 18:14:22 -03:00
b50bc46888
CPU fix for the cases using a Mask with shift = 0
2018-03-14 01:59:22 -03:00
d067b4d5e0
Remove unused function from CPU
2018-03-14 00:57:07 -03:00
553ba659c4
Add CRC32 instruction and SLI (vector)
2018-03-14 00:12:05 -03:00
2ed24af756
Add pl:u stub, use higher precision on CNTPCT_EL0 register tick count
2018-03-13 21:24:32 -03:00
6f4282daf8
IAudioDeviceService -> IAudioDevice
2018-03-12 16:31:09 -03:00
d88b5c7621
Fix GetAudioRenderersProcessMasterVolume which was totally wrong
2018-03-12 16:29:06 -03:00
7a27990faa
Allow more than one process, free resources on process dispose, implement SvcExitThread
2018-03-12 01:14:12 -03:00
3777fb44cf
Allow to enable/disable memory checks even on release mode through the flag, return error for invalid addresses on SvcMap*Memory svcs, do not return error on SvcQueryMemory (instead, return reserved for the end of the address space), other minor tweaks
2018-03-10 20:39:16 -03:00
553f6c2976
Fix EmitScalarUnaryOpF and add SSRA (vector)
2018-03-10 00:00:31 -03:00
30bcb8da33
Add FRINTM (vector) instruction
2018-03-09 23:41:05 -03:00
aa2d2b3149
Add SHLL instruction
2018-03-09 23:28:38 -03:00
be0e4007dc
Add SMLAL (vector), fix EXT instruction
2018-03-06 21:36:49 -03:00
59d1b2ad83
Add MUL (vector by element), fix FCVTN, make svcs use MakeError too
2018-03-05 16:18:37 -03:00
0e343a748d
Add FCVTL and FCVTN instruction (no Half support yet), stub SvcClearEvent
2018-03-05 12:58:56 -03:00
3edb66f389
Improve CPU initial translation speeds ( #50 )
...
* Add background translation to the CPU
* Do not use a separate thread for translation, implement 2 tiers translation
* Remove unnecessary usings
* Lower MinCallCountForReJit
* Remove unused variable
2018-03-04 14:09:59 -03:00
efef605b26
Fix REV64 (vector) instruction
2018-03-02 20:24:16 -03:00
829b1b1cc0
Add REV64 (vector) instruction
2018-03-02 20:03:28 -03:00
f39a864050
Add EXT, CMTST (vector) and UMULL (vector) instructions
2018-03-02 19:23:38 -03:00
708761963e
Fix corner cases of ADCS and SBFM
2018-02-26 15:56:34 -03:00
950011c90f
Added initial support for function names from symbol table on the cpu with tracing, fix wrong ImageEnd on executables with MOD0, fix issue on the CPU on input elimination for instruction with more than one register store
2018-02-25 22:14:58 -03:00
31b35a9645
Add FABD (scalar), ADCS, SBCS instructions, update config with better default control mappings, update readme with the new mappings
2018-02-24 18:47:08 -03:00
035efc913e
Fix cpu issue with cmp optimization, add HINT and FRINTX (scalar) instructions, fix for NvFlinger sometimes missing free buffers
2018-02-24 11:19:28 -03:00
3936c93448
Map heap on heap base region, fix for thread start on homebrew, add FCVTMU and FCVTPU (general) instructions, fix FMOV (higher 64 bits) encodings, improve emit code for FCVT* (general) instructions
2018-02-23 21:59:38 -03:00
2cba1d49f6
Add FRINTP instruction, fix opcode ctor call method creation with multithreading
2018-02-22 16:26:11 -03:00
62b827f474
Split main project into core,graphics and chocolarm4 subproject ( #29 )
2018-02-20 17:09:23 -03:00
