Misc. CPU optimizations (#575)
* Add optimizations related to caller/callee saved registers, thread synchronization and disable tier 0 * Refactoring * Add a config entry to enable or disable the reg load/store opt. * Remove unnecessary register state stores for calls when the callee is know * Rename IoType to VarType * Enable tier 0 while fixing some perf issues related to tier 0 * Small tweak -- Compile before adding to the cache, to avoid lags * Add required config entry
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@ -5,7 +5,7 @@ namespace ChocolArm64.Translation
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{
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struct ILOpCodeLoadField : IILEmit
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{
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public FieldInfo Info { get; private set; }
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public FieldInfo Info { get; }
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public ILOpCodeLoadField(FieldInfo info)
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{
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