Misc. CPU optimizations (#575)
* Add optimizations related to caller/callee saved registers, thread synchronization and disable tier 0 * Refactoring * Add a config entry to enable or disable the reg load/store opt. * Remove unnecessary register state stores for calls when the callee is know * Rename IoType to VarType * Enable tier 0 while fixing some perf issues related to tier 0 * Small tweak -- Compile before adding to the cache, to avoid lags * Add required config entry
This commit is contained in:
@ -16,6 +16,8 @@ namespace ChocolArm64.Translation
|
||||
|
||||
private ImmVal _value;
|
||||
|
||||
public long Value => _value.I8;
|
||||
|
||||
private enum ConstType
|
||||
{
|
||||
Int32,
|
||||
|
Reference in New Issue
Block a user