Misc. CPU optimizations (#575)

* Add optimizations related to caller/callee saved registers, thread synchronization and disable tier 0

* Refactoring

* Add a config entry to enable or disable the reg load/store opt.

* Remove unnecessary register state stores for calls when the callee is know

* Rename IoType to VarType

* Enable tier 0 while fixing some perf issues related to tier 0

* Small tweak -- Compile before adding to the cache, to avoid lags

* Add required config entry

ChocolArm64/Translation/ILOpCode.cs

@@ -4,16 +4,16 @@ namespace ChocolArm64.Translation
 {
     struct ILOpCode : IILEmit
     {
-        private OpCode _ilOp;
+        public OpCode ILOp { get; }
 
         public ILOpCode(OpCode ilOp)
         {
-            _ilOp = ilOp;
+            ILOp = ilOp;
         }
 
         public void Emit(ILMethodBuilder context)
         {
-            context.Generator.Emit(_ilOp);
+            context.Generator.Emit(ILOp);
         }
     }
 }