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T32: Implement Asimd instructions (#3692)

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merry
2022-09-13 22:25:37 +01:00
committed by GitHub
parent 66f16f4392
commit e05bf90af6
23 changed files with 271 additions and 215 deletions
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7
ARMeilleure/Decoders/OpCode32SimdRegElem.cs
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@ -2,11 +2,12 @@
{
class OpCode32SimdRegElem : OpCode32SimdReg
{
public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCode32SimdRegElem(inst, address, opCode);
public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCode32SimdRegElem(inst, address, opCode, false);
public new static OpCode CreateT32(InstDescriptor inst, ulong address, int opCode) => new OpCode32SimdRegElem(inst, address, opCode, true);
public OpCode32SimdRegElem(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode)
public OpCode32SimdRegElem(InstDescriptor inst, ulong address, int opCode, bool isThumb) : base(inst, address, opCode, isThumb)
{
Q = ((opCode >> 24) & 0x1) != 0;
Q = ((opCode >> (isThumb ? 28 : 24)) & 0x1) != 0;
F = ((opCode >> 8) & 0x1) != 0;
Size = (opCode >> 20) & 0x3;