vleeuwenmenno/Ryujinx
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

T32: Implement Asimd instructions (#3692)

Browse Source
This commit is contained in:
merry
2022-09-13 22:25:37 +01:00
committed by GitHub
parent 66f16f4392
commit e05bf90af6
23 changed files with 271 additions and 215 deletions
Download Patch File Download Diff File Expand all files Collapse all files

7
ARMeilleure/Decoders/OpCode32SimdLong.cs
View File

@ -4,9 +4,10 @@
{
public bool U { get; }
public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCode32SimdLong(inst, address, opCode);
public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCode32SimdLong(inst, address, opCode, false);
public static OpCode CreateT32(InstDescriptor inst, ulong address, int opCode) => new OpCode32SimdLong(inst, address, opCode, true);
public OpCode32SimdLong(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode)
public OpCode32SimdLong(InstDescriptor inst, ulong address, int opCode, bool isThumb) : base(inst, address, opCode, isThumb)
{
int imm3h = (opCode >> 19) & 0x7;
@ -18,7 +19,7 @@
case 4: Size = 2; break;
}
U = ((opCode >> 24) & 0x1) != 0;
U = ((opCode >> (isThumb ? 28 : 24)) & 0x1) != 0;
RegisterSize = RegisterSize.Simd64;