Refactoring and optimization on CPU translation (#661)
* Refactoring and optimization on CPU translation * Remove now unused property * Rename ilBlock -> block (local) * Change equality comparison on RegisterMask for consistency Co-Authored-By: gdkchan <gab.dark.100@gmail.com> * Add back the aggressive inlining attribute to the Synchronize method * Implement IEquatable on the Register struct * Fix identation
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@ -1,3 +1,4 @@
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using ChocolArm64.IntermediateRepresentation;
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using ChocolArm64.State;
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using ChocolArm64.Translation;
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using System.Reflection;
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@ -11,7 +12,7 @@ namespace ChocolArm64.Instructions
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{
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if (context.Tier == TranslationTier.Tier0)
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{
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context.EmitStoreState();
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context.EmitStoreContext();
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context.TranslateAhead(imm);
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@ -26,13 +27,13 @@ namespace ChocolArm64.Instructions
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{
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context.HasSlowCall = true;
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context.EmitStoreState();
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context.EmitStoreContext();
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context.TranslateAhead(imm);
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context.EmitLdarg(TranslatedSub.StateArgIdx);
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context.EmitFieldLoad(typeof(CpuThreadState).GetField(nameof(CpuThreadState.CurrentTranslator),
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context.EmitLdfld(typeof(CpuThreadState).GetField(nameof(CpuThreadState.CurrentTranslator),
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BindingFlags.Instance |
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BindingFlags.NonPublic));
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@ -72,7 +73,7 @@ namespace ChocolArm64.Instructions
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context.EmitSttmp();
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context.EmitLdarg(TranslatedSub.StateArgIdx);
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context.EmitFieldLoad(typeof(CpuThreadState).GetField(nameof(CpuThreadState.CurrentTranslator),
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context.EmitLdfld(typeof(CpuThreadState).GetField(nameof(CpuThreadState.CurrentTranslator),
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BindingFlags.Instance |
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BindingFlags.NonPublic));
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@ -132,7 +133,7 @@ namespace ChocolArm64.Instructions
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context.Emit(OpCodes.Pop);
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context.EmitLoadState();
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context.EmitLoadContext();
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}
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else
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{
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